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| HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver version 01 october 2011 ( doc no. HX8392-A-ds ) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/
- p.2- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 1. general description ................................ ................................................... ..........................................10 2. features........................................... ................................................... ................................................... 11 2.1 display ............................................ ................................................... ............................................11 2.2 display module..................................... ................................................... .......................................11 2.3 display / control interface .................................. ................................................... .........................12 2.4 input power ........................................ ................................................... .........................................12 2.5 miscellaneous ...................................... ................................................... .......................................12 3. device overview .................................... ................................................... ............................................13 3.1 block diagram ...................................... ................................................... .......................................13 3.2 pin description.................................... ................................................... .........................................14 3.3 pin assignment..................................... ................................................... .......................................17 3.4 pad coordinates .................................... ................................................... .....................................18 3.4.1 bump arrangement................................... ................................................... ......................24 3.4.2 alignment mark ..................................... ................................................... .........................25 4. interface.......................................... ................................................... ................................................... .26 4.1 interface select................................... ................................................... .........................................26 4.2 dsi system interface............................... ................................................... ....................................27 4.2.1 dsi layer definitions .............................. ................................................... .........................28 4.2.2 dsi protocol....................................... ................................................... .............................29 4.2.3 processor to peripheral (forward direction) packets data types........................................ 32 4.2.4 peripheral to processor (reverse direction) packet data type .......................................... .38 4.2.5 data format for command mode....................... ................................................... .............41 5. function description ............................... ................................................... .........................................42 5.1 display data gram.................................. ................................................... ...................................42 5.2 address counter (ac) ............................... ................................................... ..................................42 5.3 source, gate and memory map........................ ................................................... ...........................43 5.3.1 800rgb x 1280 resolution ........................... ................................................... ..................43 5.3.2 768rgb x 1280 resolution ........................... ................................................... ..................44 5.3.3 720rgb x 1280 resolution ........................... ................................................... ..................45 5.3.4 600rgb x 1024 resolution ........................... ................................................... ..................46 5.4 mcu to memory write / read direction ............... ................................................... .........................47 5.5 fully display, partial display, vertical scrolling display............................................ ........................49 5.5.1 fully display...................................... ................................................... ..............................49 5.5.2 vertical scrolling display ......................... ................................................... ........................53 5.5.3 tearing effect output line ......................... ................................................... .......................56 5.6 oscillator ......................................... ................................................... ............................................61 5.7 source driver...................................... ................................................... .........................................62 5.8 lcd power generation scheme ........................ ................................................... ..........................63 5.9 dc/dc converter circuit ............................ ................................................... ..................................64 5.9.1 use charge pump step up circuit.................... ................................................... ................64 5.9.2 use hx5186-a ....................................... ................................................... ........................65 5.10 idle display ....................................... ................................................... ...........................................66 5.11 gamma characteristic correction function ........... ................................................... .......................67 5.11.1 gamma-characteristics adjustment register.......... ................................................... ........68 5.12 characteristics of i/o ............................. ................................................... ...................................106 5.12.1 output or bi-directional (i/o) pins ................ ................................................... .................106 5.12.2 input pins......................................... ................................................... .............................106 5.13 sleep out Ccommand and self-diagnostic functions of the display module ................................ 107 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of contents october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.3- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.13.1 register loading detection......................... ................................................... ...................107 5.13.2 functionality detection ............................ ................................................... .....................108 5.14 power on/off sequence .............................. ................................................... ...............................109 5.14.1 case 1: resx line is held high or unstable by host at power on....................................110 5.14.2 case 2: resx line is held low by host at power on .. ................................................... ... 111 5.15 uncontrolled power off ............................. ................................................... ................................. 111 5.16 content adaptive brightness control (cabc) function ................................................... ..............112 5.16.1 module architectures ............................... ................................................... .....................113 5.16.2 cabc block ......................................... ................................................... .........................114 5.16.3 brightness control block ........................... ................................................... ....................115 5.16.4 minimum brightness setting of cabc function........ ................................................... .....116 5.17 otp programing..................................... ................................................... ...................................117 5.17.1 otp table .......................................... ................................................... ...........................117 5.17.2 otp programming flow ............................... ................................................... .................125 5.17.3 programming sequence ............................... ................................................... ................126 5.17.4 otp programming example of vcom setting vcmc ....... .............................................127 5.17.5 otp programming example of id1, id2 and id3........ ................................................... .128 5.17.6 otp read example of 0x7dh (vcmc_1)................. ................................................... .....129 6. command ............................................ ................................................... .............................................130 6.1 command list ....................................... ................................................... .....................................130 6.1.1 standard command ................................... ................................................... ...................130 6.1.2 user define command list table..................... ................................................... ...............134 6.2 command description ................................ ................................................... ...............................139 6.2.1 nop (00h) .......................................... ................................................... ..........................139 6.2.2 software reset (01h)............................... ................................................... ......................140 6.2.3 read display identification information (04h) ...... ................................................... ........141 6.2.4 rdnumpe: read number of the parity errors (05h) .... ..................................................1 42 6.2.5 read display status (09h) .......................... ................................................... .................143 6.2.6 get_power_mode (0ah) ............................... ................................................... ................146 6.2.7 read display madctl (0bh) .......................... ................................................... .............148 6.2.8 get_pixel_format (0ch) ............................. ................................................... ...................150 6.2.9 get_display_mode (0dh) ............................. ................................................... ................152 6.2.10 get_signal_mode (0eh) .............................. ................................................... .................154 6.2.11 get_diagnostic_result (0fh)........................ ................................................... .................155 6.2.12 enter_sleep_mode (10h)............................. ................................................... .................156 6.2.13 exit_sleep_omde (11h).............................. ................................................... ...................157 6.2.14 enter_partial_mode (12h) ........................... ................................................... .................158 6.2.15 enter_normal_mode (13h) ............................ ................................................... ...............159 6.2.16 exit_inversion_mode (20h) .......................... ................................................... ................160 6.2.17 enter_inversion_mode (21h)......................... ................................................... ...............161 6.2.18 all_pixel_off (22h) ................................ ................................................... .......................162 6.2.19 all_pixel_on (23h) ................................. ................................................... ......................163 6.2.20 set_gamma_curve (26h).............................. ................................................... ................164 6.2.21 set_display_off (28h) .............................. ................................................... .....................165 6.2.22 set_display_on (29h) ............................... ................................................... ....................166 6.2.23 set_clumn_address (2ah)............................ ................................................... ................167 6.2.24 set_page_address (2bh) ............................. ................................................... ................168 6.2.25 write_memory_start (2ch) ........................... ................................................... ................169 6.2.26 raed_memory_start (2eh) ............................ ................................................... ...............170 6.2.27 set_partial_area (30h)............................. ................................................... .....................171 6.2.28 set_scroll_area (33h) .............................. ................................................... .....................173 6.2.29 tearing effect line off (34h)...................... ................................................... .....................176 6.2.30 set_tear_on (35h) .................................. ................................................... ......................177 6.2.31 set_address_mode (36h)............................. ................................................... ................178 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of contents october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.4- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 6.2.32 set_scroll_start (37h) ............................. ................................................... ......................180 6.2.33 idle mode off (38h) ................................ ................................................... .......................181 6.2.34 enter_idle_mode (39h) .............................. ................................................... ..................182 6.2.35 set_pixel_format (3ah) ............................. ................................................... ...................183 6.2.36 write_memory_contiune (3ch) ........................ ................................................... ............184 6.2.37 raed_memory_continue (3eh) ......................... ................................................... ...........185 6.2.38 set tear scan lines (44h) .......................... ................................................... ....................186 6.2.39 get the current scanline(45h)...................... ................................................... .................187 6.2.40 write display brightness (51h)..................... ................................................... .................188 6.2.41 read display brightness value (52h)................ ................................................... ............189 6.2.42 write ctrl display (53h) ........................... ................................................... ..................190 6.2.43 read ctrl value display (54h) ...................... ................................................... .............191 6.2.44 write content adaptive brightness control (55h) .... ................................................... ......192 6.2.45 read content adaptive brightness control (56h) ..... ................................................... .....193 6.2.46 write cabc minimum brightness (5eh)................ ................................................... .......194 6.2.47 read cabc minimum brightness (5fh)................. ................................................... ......195 6.2.48 read automatic brightness control self-diagnostic r esult (68h) ......................................19 6 6.2.49 read_ddb_start (a1h) ............................... ................................................... .................197 6.2.50 read_ddb_continue (a8h)............................ ................................................... ..............199 6.2.51 read id1 (dah)..................................... ................................................... .......................200 6.2.52 read id2 (dbh)..................................... ................................................... .......................201 6.2.53 read id3 (dch)..................................... ................................................... .......................202 6.2.54 setosc: set internal oscillator (b0h) .............. ................................................... ...........203 6.2.55 setpower: set power (b1h).......................... ................................................... ...........204 6.2.56 setdisp: set display related register (b2h) ........ ................................................... .......213 6.2.57 setrgbif: set rgb interface related register (b3h) . ................................................... 216 6.2.58 setmpucyc: set mpu/command mode panel driving timin g(rb4h) ..........................217 6.2.59 setvcom: set vcom voltage (b6h).................... ................................................... ......223 6.2.60 sette: set internal te function (b7h) .............. ................................................... ..........226 6.2.61 setextc: set extension command (b9h) ............... ................................................... ...227 6.2.62 setmipi: (bah)..................................... ................................................... .......................228 6.2.63 setotp: set otp (bbh) .............................. ................................................... ...............229 6.2.64 setptba: set internal power(bfh)................... ................................................... ..........230 6.2.65 setdsimo: set display mode (c2h)................... ................................................... ........231 6.2.66 setid: set id (c3h)................................ ................................................... .....................232 6.2.67 setddb: set ddb (c4h).............................. ................................................... ...............233 6.2.68 setcabc: set cabc control (c9h) .................... ................................................... ........234 6.2.69 setcabcgain (cah) .................................. ................................................... ...............237 6.2.70 setpanel (cch) ..................................... ................................................... ...................239 6.2.71 seteq (d4h) ........................................ ................................................... .......................240 6.2.72 segckeq: set gck eq function (d5h) ................. ................................................... ....241 6.2.73 setrgbcyc: set rgb/video mode panel driving timing( rd8h)..................................242 6.2.74 setgamma: set gamma curve related setting (e0h).... ................................................248 6.2.75 setggamma: set green gamma curve related setting (e 1h).......................................250 6.2.76 setbgamma: set green blue curve related setting (e2 h) ............................................252 6.2.77 setchemode (e3h) ................................... ................................................... ...............254 6.2.78 setotpkey (e9h) .................................... ................................................... ..................255 6.2.79 gethxid (f4h)...................................... ................................................... ......................256 6.2.80 getdb (f7h) ........................................ ................................................... .......................257 7. layout recommendation .............................. ................................................... .................................258 7.1 layout recommendation .............................. ................................................... ............................258 7.1.1 architecture 1 C internal charge pumping circuit... ................................................... .......258 7.1.2 architecture 2 - hx5186-a .......................... ................................................... .................259 7.2 maximum layout resistance .......................... ................................................... ............................260 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of contents october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.5- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 7.3 external components connection ..................... ................................................... .......................261 8. electrical characteristics ......................... ................................................... ......................................263 8.1 absolute maximum ratings........................... ................................................... .............................263 8.2 dc characteristics ................................. ................................................... ....................................264 8.3 ac characteristics ................................. ................................................... ....................................265 8.3.1 reset input timing................................. ................................................... ........................265 8.3.2 dsi d-phy electrical characteristics............... ................................................... .............266 8.3.3 timings for dsi video mode ......................... ................................................... ...............274 9. ordering information ............................... ................................................... .......................................278 10. revision history ................................... ................................................... ...........................................278 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of contents october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.6- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 figure 4.1: dsi transmitter and receiver interface . ................................................... .................27 figure 4.2: dsi transmitter and receiver interface . ................................................... .................28 figure 4.3: multiple hs transmission packets ....... ................................................... ..................29 figure 4.4: structure of the short packet.......... ................................................... .......................29 figure 4.5: structure of the long packet ........... ................................................... .......................30 figure 4.6: the format of data id. ................. ................................................... ..........................30 figure 4.7: show short- / long-packet transmission command sequence ................................31 figure 4.8: data format of dsi command mode ........ ................................................... .............41 figure 5.1: mcu to memory write / read direction ... ................................................... ...............47 figure 5.2: my, mx, mv setting of 800rgb x 1280 dot ................................................... .........47 figure 5.3: my, mx, mv setting of 800rgb x 1280 dot ................................................... .........47 figure 5.4: address direction settings............. ................................................... ........................48 figure 5.5: 800rgb x 1280 resolution............... ................................................... .....................49 figure 5.6: 768rgb x 1280 resolution............... ................................................... .....................50 figure 5.7: 720rgb x 1280 resolution............... ................................................... .....................51 figure 5.8: 600rgb x 1024 resolution............... ................................................... .....................52 figure 5.9: vertical scrolling ..................... ................................................... ...............................53 figure 5.10: memory map of vertical scrolling 1 for 800rgb x 1280 resolution........................53 figure 5.11: memory map of vertical scrolling 2 for 800rgb x 1280 resolution ........................54 figure 5.12: vertical scroll example 1 ............. ................................................... ........................55 figure 5.13: vertical scroll example 2 ............. ................................................... ........................55 figure 5.14: tearing effect output signal mode 1 ... ................................................... ...............56 figure 5.15: te delay output ....................... ................................................... ..........................56 figure 5.16: tearing effect output signal mode 2 ... ................................................... ...............57 figure 5.17: te output for teline setting .......... ................................................... ...................57 figure 5.18: tearing effect output signal .......... ................................................... .....................57 figure 5.19: tearing effect output line Ctearing ef fect line timing................................... ............58 figure 5.20: tearing effect output lineCdefinition of tf, tr .......................................... ..................58 figure 5.21: tearing effect output lineCexample 1 ( timing) ............................................ ...........59 figure 5.22: tearing effect output lineCexample 1 ( image)............................................. ...........59 figure 5.23: tearing effect output lineCexample 2 ( timing) ............................................ ...........60 figure 5.24: tearing effect output lineCexample 2 ( image)............................................. ...........60 figure 5.25: osc aritecture ........................ ................................................... ............................61 figure 5.26: inversion mode........................ ................................................... ............................62 figure 5.27: lcd power generation scheme ........... ................................................... ...............63 figure 5.28: dc/dc converter circuit of internal ch arge pump .......................................... ........64 figure 5.29: dc/dc converter circuit of hx5186-a ... ................................................... .............65 figure 5.30: idle mode grayscale control ........... ................................................... .....................66 figure 5.31: grayscale control ..................... ................................................... ...........................67 figure 5.32: gamma resister stream and gamma refere nce voltage ........................................ 69 figure 5.34: sleep out flow chartCcommand and self- diagnostic functions.............................10 7 figure 5.35: sleep out flow chart internal function detection ......................................... ..........108 figure 5.36: case 1: resx line is held high or unst able by host at power on ........................110 figure 5.37: case 2: resx line is held low by host at power on........................................ ..... 111 figure 5.38: cabc block diagram.................... ................................................... .....................112 figure 5.39: module architecture ................... ................................................... .......................113 figure 5.40: cabc gain / cabc duty generation ...... ................................................... ...........114 figure 5.41: cabc_pwm_out output duty.............. ................................................... ...........115 figure 5.42: otp programming sequence.............. ................................................... ..............125 figure 5.43: otp programming sequence example 1 .... ................................................... ......127 figure 5.44: otp programming sequence example 2 .... ................................................... ......128 figure 5.54: otp read sequence flow of index 0x7dh . ................................................... ........129 figure 7.1: layout recommendation of internal charg e pumping circuit ................................25 8 figure 7.2: layout recommendation of hx5186-a ...... ................................................... ........259 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of figure s october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.7- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 figure 8.1: reset input timing ..................... ................................................... ..........................265 figure 8.2: electrical functions of a fully d-phy t ransceiver......................................... ...........266 figure 8.3: shows both the hs and lp signal levels . ................................................... ...........266 figure 8.4: input glitch rejections of low-power re ceivers............................................ .......269 figure 8.5: ddr clock definition ................... ................................................... .......................271 figure 8.6: data to clock timing definitions....... ................................................... ..................272 figure 8.7: vertical timings for rgb i/f........... ................................................... .....................274 figure 8.8: horizontal timing for dsi video mode i/ f.................................................. ............276 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver l ist of figure s october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.8- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 table 4.1: interface selection ..................... ................................................... .............................26 table 4.2: pin connection based on different interf ace ................................................ ..............26 table 4.3: data types for processor-sourced packets ................................................... .............32 table 4.4: shows the error report bit definitions.. ................................................... ....................39 table 4.5: the complete set of peripheral-to-proces sor data types..................................... ......40 table 5.1: addresses counter range................. ................................................... .......................42 table 5.2: memory map of 800rgb x 1280 resolution .. ................................................... .........43 table 5.3: memory map of 768rgb x 1280 resolution .. ................................................... .........44 table 5.4: memory map of 720rgb x 1280 resolution .. ................................................... .........45 table 5.5: memory map of 600rgb x 1024 resolution .. ................................................... .........46 table 5.6: ac characteristics of tearing effect sig nal ................................................ .................58 table 5.7: source output for panel resolution ...... ................................................... ...................62 table 5.8: voltage configuration ................... ................................................... ...........................63 table 5.9: gamma-adjustment registers.............. ................................................... ...................68 table 5.10: offset adjustment 0~5 .................. ................................................... ........................70 table 5.11: center adjustment...................... ................................................... ...........................70 table 5.12: vinp0 .................................. ................................................... ..................................71 table 5.13: vinp1 .................................. ................................................... ..................................72 table 5.14: vinp2 .................................. ................................................... ..................................73 table 5.15: vinp14 ................................. ................................................... .................................74 table 5.16: vinp15 ................................. ................................................... .................................75 table 5.17: vinp16 ................................. ................................................... .................................76 table 5.18: vinp5 .................................. ................................................... ..................................78 table 5.19: vinp11 ................................. ................................................... .................................80 table 5.20: vinp3 .................................. ................................................... ..................................81 table 5.21: vinp4 .................................. ................................................... ..................................82 table 5.22: vinp6 .................................. ................................................... ..................................82 table 5.23: vinp7 .................................. ................................................... ..................................83 table 5.24: vinp8 .................................. ................................................... ..................................83 table 5.25: vinp9 .................................. ................................................... ..................................84 table 5.26: vinp10 ................................. ................................................... .................................84 table 5.27: vinp12 ................................. ................................................... .................................85 table 5.28: vinp13 ................................. ................................................... .................................85 table 5.29: vinn0 .................................. ................................................... ..................................86 table 5.30: vinn1 .................................. ................................................... ..................................87 table 5.31: vinn2 .................................. ................................................... ..................................88 table 5.32: vinn14 ................................. ................................................... .................................89 table 5.33: vinn15 ................................. ................................................... .................................90 table 5.34: vinn16 ................................. ................................................... .................................91 table 5.35: vinn5 .................................. ................................................... ..................................93 table 5.36: vinn11 ................................. ................................................... .................................95 table 5.37: vinn3 .................................. ................................................... ..................................96 table 5.38: vinn4 .................................. ................................................... ..................................97 table 5.39: vinn6 .................................. ................................................... ..................................97 table 5.40: vinn7 .................................. ................................................... ..................................98 table 5.41: vinn8 .................................. ................................................... ..................................98 table 5.42: vinn9 .................................. ................................................... ..................................99 table 5.43: vinn10 ................................. ................................................... .................................99 table 5.44: vinn12 ................................. ................................................... ...............................100 table 5.45: vinn13 ................................. ................................................... ...............................100 table 5.46: voltage calculation formula of 64-grays cale voltage (positive polarity).................10 1 table 5.47: voltage calculation formula of 64-grays cale voltage (negative polarity) ...............102 table 5.48: voltage calculation formula of 256-gray scale voltage (positive/negative polarity)105 table 5.49: characteristics of output or bi-directi onal (i/o) pins .................................... ..........106 table 5.50: characteristics of input pins .......... ................................................... .....................106 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip drive r l ist of table s october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ - p.9- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 table 5.51: cabc timing table ...................... ................................................... ........................115 table 5.52: otp table.............................. ................................................... ..............................117 table 5.53: otp programming sequence ............... ................................................... ..............126 table 7.1: maximum layout resistance ............... ................................................... ................260 table 7.2: adoptability of component ............... ................................................... .....................262 table 8.1: absolute maximum rating ................. ................................................... ....................263 table 8.2: dc characteristic ....................... ................................................... ...........................264 table 8.3: reset timing............................ ................................................... ..............................265 table 8.4: lp transmitter dc specifications ........ ................................................... .................267 table 8.5: lp transmitter ac specifications........ ................................................... .................267 table 8.6: hs receiver dc specifications ........... ................................................... .................268 table 8.7: hs receiver ac specifications ........... ................................................... .................268 table 8.8: lp receiver dc specifications........... ................................................... ..................269 table 8.9: lp receiver ac specifications........... ................................................... ..................269 table 8.10: contention detector dc specifications .. ................................................... ............270 table 8.11: re verse hs data transmission timing pa rameters........................................... .272 table 8.12: data to clock timing specifications .... ................................................... ...............273 table 8.13: vertical timings for rgb i/f ........... ................................................... ....................275 table 8.14: horizontal timings for dsi video mode i /f ................................................. ..........277 HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip drive r l ist of table s october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.10- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 1. general description this document describes himaxs HX8392-A supports w xga resolution driving controller. the HX8392-A is designed to provide a s ingle-chip solution that combines a source driver, gate driver control, power supply circuit to drive a ltps dot matrix lcd with 800rgbx1280 dots at maximum. the HX8392-A can be operated in low-voltage conditi on for the interface and integrated internal boosters that produce the liqui d crystal voltage, breeder resistance and the voltage follower circuit for liquid crystal driver. in addition, the HX8392-A also supports various functions to reduce the power cons umption of a lcd system via software control. the HX8392-A supports mipi dsi (display serial inte rface) interface mode. the interface mode is selected by the external hardware pins bs3~0. the HX8392-A is suitable for any small portable bat tery-driven and long-term driving products, such as small pdas, digital cellular phon es and bi-directional pagers. HX8392-A 800rgb x 1280 dot, 16.7m color, with internal gram, ltps mobile single chip driver version 01 october, 2011 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.11- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 2. features 2.1 display single chip solution for a wxga ltps type lcd displ ay resolution: 800rgb x 1280 768rgb x 1280 720rgb x 1280 600rgb x 1024 display color modes full color mode: 16.7m colours (24-bit 8(r):8(g):8(b)) reduce color mode: 262k colours (18-bit 6(r):6(g):6(b)) 65k colours (16-bit 5(r):6(g):5(b)) 8 colors (idle mode on): 8 colors (3-bit binary mod e) 2.2 display module support 800 source channel outputs internal level shifter for gate driver control supports 1-dot / 2-dot / 4-dot / column inversion gamma correction (4 preset gamma curve) on module vcom control (-2 to 0v common electrode o utput voltage range) on module dc/dc converter vsp=4.7 to 5.7v vsn=-5.7 to -4.7v positive source output voltage level: vspr=3.5v to 5v negative source output voltage level: vsnr=-5v to -3.5v positive gate driver output voltage level: vgh=+9v to +12v negative gate driver output voltage level: vgl=-5v to -8v vcom=-2.0v to 0v, a step=16mv internal memory for image data ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.12- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 2.3 display / control interface display interface types supported mipi-dsi (display serial interface) interface support dsi version 1.02 support d-phy version 1.00 2.4 input power i/o and interface power supply (vdd1): 1.65v to 3.3 v analog power supply (vdd2): 2.5v to 4.8v logic power supply (vdd3): 2.5v to 4.8v high speed interface power supply (hs_vcc): 2.5v to 4.8v otp programming voltage (vpp): 7.5v 0.2v 2.5 miscellaneous partial display mode software programmable color depth mode oscillator for display clock generation low power consumption, suitable for battery operate d systems cmos compatible inputs proprietary multi phase driving for lower power con sumption gas function for preventing image sticking when abn ormal power off optimized layout for cog assembly temperature range: -40 to +85 c dc/dc converter for source support dc com driving vcom voltage generator on-chip otp program voltage generator otp memory to store initialization register setting s 3 times mtp for vcom setting ,id setting support cabc (content adaptive brightness control) function support color enhancement ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.13- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 3. device overview 3.1 block diagram internal test function gate control unit grayscale voltage generator gamma adjusting circuit source driver d/a converter circuit data latch s1 ~ s800 internal register otp gram process control gram timing control dc / dc converter mode selection c21p / c21n v gh v gl vcom cricuit v c om r vcom vcom_l vcom_r gsp_l/r gck1_l/r gck2_l/r gck3_l/r gck4_l/r gck5_l/r gck6_l/r gck7_l/r gck8_l/r init_l/r ud_l/r sw1_l/r sw1b_l/r sw2_l/r sw2b_l/r sw3_l/r sw3b_l/r bs3-0 4 vssd vssa color enhancement function cabc_pwm_out abc function te 24-bit display data cabc function 24-bit display data vdd3 dsi interface hs_d0p / hs_d0n 8 vssac generator timing osc rc osc test2~0 resx hs_vss hs_vcc csx rdx wrx_scl dcx 24 db23~0 sdo 8 hs_ckp / hs_ckn 8 sdi vsync hsync pclk de vtestoutp / vtestoutn 2 vpp v0~255 c22p / c22n vsp vsn 54 voltage reference vspr vsnr vref vddd vdddn hs_ldo vcl c41p / c41n hs_d1p / hs_d1n pbctl_a1/2 pbctl_a1/2 c42p / c42n c31p / c31n c32p / c32n c11p / c11n c12p / c12n c13p / c13n c14p / c14n hs_d2p / hs_d2n 8 8 hs_d3p / hs_d3n vspc vcsw1 vcsw2 note: type 1 display data path type 3 display data path c15p / c15n c16p / c16n c17p / c17n c18p / c18n c23p / c23n c24p / c24n ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.14- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 3.2 pin description host interface pins signals i/o pin no. connected with description bs3 ~ bs0 i 4 vssd / vdd1 select the mpu interface mode as listed below: bs3 bs2 bs1 bs0 interface mode db pins display mode 0 1 1 0 0 1 1 1 dsi interface (note 2) hs_cp/n, hs_d0p/n, hs_d1p/n, hs_d2p/n, hs_d3p/n type 1/3 other setting not open, only for internal test - - note 1: pixel format (rgb565 / rgb666 / rgb888) is selected by dcs command (0x3ah) must be connected to vssd or vdd1. note 2: input pin to select clock/data lane polarit y in dsi interface only. pin name hs_cp hs_cn hs_dxp hs_dxn bs[3-0]=0110 positive negative positive negative bs[3-0]=0111 negative positive negative positive csx i 1 mpu only for internal test. please connect it to vssd or vdd1. resx i 1 mpu or reset circuit reset pin. setting either pin low initializes the l si. must be reset after power is supplied (must be connected to vssd or vdd1). rdx i 1 mpu only for internal test. please connect it to vssd or vdd1. dcx i 1 mpu only for internal test. please connect it to vssd or vdd1. wrx_scl i 1 mpu only for internal test. please connect it to vssd or vdd1. db23~0 i/o 24 mpu only for internal test. let the unused pins open for each mode. sdo o 1 mpu only for internal test. let it to open . sdi i 1 mpu only for internal test. please connect it to vssd or vdd1. hsync i 1 mpu only for internal test. please connect it to vssd or vdd1. de i 1 mpu only for internal test. please connect it to vssd or vdd1. vsync i 1 mpu only for internal test. please connect it to vssd or vdd1. pclk i 1 mpu only for internal test. please connect it to vssd or vdd1. source driver output pins s1 to s800 o 800 lcd output voltages applied to the liquid crystal. rgb resolution source channels 600rgb s1 ~ s300, s501~s800 720rgb s1 ~ s360, s441~s800 768rgb s1 ~ s384, s417~s800 800rgb s1 ~ s800 te o 1 mpu serves te (tearing effect ) output pin. te1 o 1 mpu serves te (tearing effect ) pin of each scan line. gate driver control singal gsp_l, gsp_r o 2 lcd gate driver start pulse. gck1_l, gck1_r o 2 lcd gate driver clock 1 if not use, let it open gck2_l, gck2_r o 2 lcd gate driver clock 2 if not use, let it open gck3~8_l, gck3~8_r o 12 lcd gate driver clock 3~10 if not use, let it open init_l, init_r o 2 lcd initialization signal for panel if not use, let it open ud_l, ud_r o 2 lcd invert control signal panel for panel if not use, let it open ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.15- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 sw1_l, sw1_r, sw1b_l, sw1b_r o 4 lcd source driver output select signal 1 if not use, let it open sw2_l, sw2_r, sw2b_l, sw2b_r o 4 lcd source driver output select signal 2 if not use, let it open sw3_l, sw3_r, sw3b_l, sw3b_r o 4 lcd source driver output select signal 3 if not use, let it open power supply pins vdd1 i 7 power supply a power supply for the i/o circuit. vdd1=1.65 to 3.3v vdd2 i 2 power supply a power supply for the analog power. vdd2=2.5v to 4.8v vdd2 input level should be same as vdd3 input level t o avoid the level-mismatching at internal level shifter circuit . vdd3 i 20 power supply a power supply for the logic power, dc/dc converter vdd3=2.5v to 4.8v. vssa p 16 power supply analoge ground. vssa=0v. when using the cog method, conne ct to vssd on the fpc to prevent noise. vssac p 6 power supply analoge ground. must connect to vssa on the fpc. vssd p 32 power supply ground for the internal logic. vssd=0v. when using the cog method, connect to vssa on the fpc to prevent noise. vpp i 2 power supply external high voltage pin used in otp mode and opera tes at 7.5v. if not used, let it open. power supply pins vsp i 10 stabilizing capacitor input voltage from the set-up circuit (4.7v to 5.5v ). i t is generated from vdd3. vsn i 6 stabilizing capacitor input voltage from the set-up circuit (-4.7v to - 5.5v). it is generated from vdd3. place a schottkey barrier diode between vsn and v gl. vcl i 4 stabilizing capacitor input voltage from the set-up circuit (-vdd3). it is generated from vdd3. vspc i 2 vsp positive boosting reference voltage input. vspr o 2 stabilizing capacitor positive regulated voltage output (3.5v to vsp - 0.5) vsnr o 2 stabilizing capacitor positive regulated voltage output (-3.5v to vsn + 0.5) vddd o 12 stabilizing capacitor internal logic voltage output vdddn o 8 stabilizing capacitor internal logic voltage output (-2.5v fixed) vref o 2 stabilizing capacitor reference voltage from internal band gap circuit. t he tolerance of vref voltage is 3 .(1.8v fixed) vgh o 7 stabilizing capacitor output voltage from the step-up circuit, it is gene rated from vsp and vsn. connect to a stabilizing capacitor between vssa and vgh. vgh_l o 3 lcd output voltage for panel. if not used , please open. vgh_r o 7 lcd output voltage for panel. if not used , please open. vgl o 13 stabilizing capacitor output voltage from the step-up circuit, it is gene rated from vsp and vsn. connect to a stabilizing capacitor between vssa and vgl. place a schottkey barrier diode between vssa and vgl. vcom, vcom_l, vcom_r o 22 stabilizing capacitor the power supply of common voltage in dc com drivin g. the voltage range is set between -2v to 0v. it must be connected a sta bilizing capacitor 2.2u to vssd. vcomr i 2 input the input pad of external vcom voltage. dc/dc pumping c11p, c11n c12p, c12n c13p, c13n c14p, c14n c15p, c15n c16p, c16n c17p, c17n c18p, c18n i/o 64 step-up capacitor in internal charge pumping mode: connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vsp voltage. in external charge pumping mode mode: not used, please open these pin. c31p, c31n c32p, c32n c23p, c23n c24p, c24n i/o 32 step-up capacitor in internal charge pumping mode: connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vsn voltage. in external charge pumping mode mode: not used, please open these pin. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.16- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 c21p, c21n c22p, c22n i/o 16 step-up capacitor connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vgh and vgl voltage. c41p, c41n c42p, c42n i/o 16 step-up capacitor connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vcl voltage. vcsw1, vcsw2 o 2 - in internal charge pumping mode: not used, please open these pin. in external charge pumping mode mode: vcsw1 and vcsw2 connect to hx5186-a. cabc & abc & ambient light sensor cabc_pwm_out o 1 - backlight on/fff control pin. if use cabc function, th e pin can connect to external led driver ic. the output voltage range=0 t o vdd1. programming pwm output pbctl_a1/ pbctl_a2 o 2 - dummy pin. please open. pbctl_b1/ pbctl_b2 o 2 - dummy pin. please open high speed interface parts hs_d0p, hs_d0n i/o 8 dsi host mipi-dsi data differential signal input pins. (data l ane 0) if not used , please connected to vssd or open.. hs_cp, hsi_cn i 8 dsi host mipi-dsi clock differential signal input pins. if not used , please connected to vssd or open.. hs_d1p, hs_d1n i 8 dsi host mipi-dsi data differential signal input pins. (data l ane 1) if not used , please connected to vssd or open. hs_d2p, hs_d2n i 8 dsi host mipi-dsi data differential signal input pins. (data l ane 2) if not used , please connected to vssd or open.. hs_d3p, hs_d3n i 8 dsi host mipi-dsi data differential signal input pins. (data l ane 3) if not used , please connected to vssd or open.. hs_vcc p 4 power supply power supply for the mipi dsi analog power. hs_vcc=2.5v to 4.8v hs_vss p 14 ground mipi dsi analogy ground. hs_vss=0v. when using the cog me thod, connect to vssa on the fpc to prevent noise. hs_ldo o 4 capacitor dsi i/f: dsi regulator output pin. (1.5v) connect to a stabilizing capacitor between hs_ldo a nd hs_vss if not used, please open these pins. test pins osc i 1 open oscillator input for test purpose. if not used, please let it open or connected to vssd.( weak pull low) test0 i 1 open a test pin. this pin is by internal logic function t est.this pin can output on fpc. if not used, let it open or connected to vssd.(wea k pull low) test1 i 1 open a test pin. this pin is by internal logic function t est.this pin can output on fpc. if not used, let it open or connected to vssd.(wea k pull low) test2 i 1 open a test pin. this pin is by internal logic function t est.this pin can output on fpc. if not used, let it open or connected to vssd.(wea k pull low) vtestoutp o 1 open a test pin. disconnect it. this pin will output gamm a voltage. this pin can output on fpc. vtestoutn o 1 open a test pin. disconnect it. this pin will output gamm a voltage. this pin can output on fpc. dummyr1 dummyr2 - 2 open dummy pads. available for measuring the cog contact resistance. they are short-circuited within the chip. dummy - 166 open not used. let it open. iognddum - 5 open dummy pad. connect to grand internally. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.17- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 3.3 pin assignment ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.18- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 3.4 pad coordinates no. name x y no. name x y no. name x y no. name x y 1 dummy -12977.5 -696.5 61 vdddn -9377.5 -696.5 121 rdx -5535 -696.5 181 hs_d1n -1302.5 -696.5 2 vcom -12917.5 -696.5 62 vdddn -9317.5 -696.5 122 iognddum -5460 -696.5 182 hs_d1n -1242.5 -696.5 3 vcom -12857.5 -696.5 63 vdddn -9257.5 -696.5 123 db23 -5385 -696.5 183 hs_d1n -1182.5 -696.5 4 vcom -12797.5 -696.5 64 vdddn -9197.5 -696.5 124 db22 -5310 -696.5 184 hs_d1n -1122.5 -696.5 5 vcom -12737.5 -696.5 65 vdd3 -9137.5 -696.5 125 db21 -5235 -696.5 185 hs_vss -1062.5 -696.5 6 vcom -12677.5 -696.5 66 vdd3 -9077.5 -696.5 126 db20 -5160 -696.5 186 hs_ckp -1002.5 -696.5 7 vcom -12617.5 -696.5 67 vdd3 -9017.5 -696.5 127 db19 -5085 -696.5 187 hs_ckp -942.5 -696.5 8 dummy -12557.5 -696.5 68 vdd3 -8957.5 -696.5 128 db18 -5010 -696.5 188 hs_ckp -882.5 -696.5 9 vcomr -12497.5 -696.5 69 vdd3 -8897.5 -696.5 129 db17 -4935 -696.5 189 hs_ckp -822.5 -696.5 10 vcomr -12437.5 -696.5 70 vdd3 -8837.5 -696.5 130 db16 -4860 -696.5 190 hs_ckn -762.5 -696.5 11 vgl -12377.5 -696.5 71 vdd3 -8777.5 -696.5 131 iognddum -4785 -696.5 191 hs_ckn -702.5 -696.5 12 vgl -12317.5 -696.5 72 vdd3 -8717.5 -696.5 132 db15 -4710 -696.5 192 hs_ckn -642.5 -696.5 13 vgl -12257.5 -696.5 73 vcsw1 -8657.5 -696.5 133 db14 -4635 -696.5 193 hs_ckn -582.5 -696.5 14 vgh -12197.5 -696.5 74 vcsw2 -8597.5 -696.5 134 db13 -4560 -696.5 194 hs_vss -522.5 -696.5 15 vgh -12137.5 -696.5 75 vddd -8537.5 -696.5 135 db12 -4485 -696.5 195 hs_d0p -462.5 -696.5 16 vgh -12077.5 -696.5 76 vddd -8477.5 -696.5 136 db11 -4410 -696.5 196 hs_d0p -402.5 -696.5 17 vgh_r -12017.5 -696.5 77 vddd -8417.5 -696.5 137 db10 -4335 -696.5 197 hs_d0p -342.5 -696.5 18 vgh_r -11957.5 -696.5 78 vddd -8357.5 -696.5 138 db9 -4260 -696.5 198 hs_d0p -282.5 -696.5 19 vgh_r -11897.5 -696.5 79 vddd -8297.5 -696.5 139 db8 -4185 -696.5 199 hs_d0n -222.5 -696.5 20 vgh_r -11837.5 -696.5 80 vddd -8237.5 -696.5 140 iognddum -4110 -696.5 200 hs_d0n -162.5 -696.5 21 vssa -11777.5 -696.5 81 vddd -8177.5 -696.5 141 db7 -4035 -696.5 201 hs_d0n -102.5 -696.5 22 vssa -11717.5 -696.5 82 vddd -8117.5 -696.5 142 db6 -3960 -696.5 202 hs_d0n -42.5 -696.5 23 vssa -11657.5 -696.5 83 vddd -8057.5 -696.5 143 db5 -3885 -696.5 203 hs_vss 17.5 -696.5 24 vssa -11597.5 -696.5 84 vddd -7997.5 -696.5 144 db4 -3810 -696.5 204 hs_d3p 77.5 -696.5 25 vssa -11537.5 -696.5 85 vddd -7937.5 -696.5 145 db3 -3735 -696.5 205 hs_d3p 137.5 -696.5 26 vssa -11477.5 -696.5 86 vddd -7877.5 -696.5 146 db2 -3660 -696.5 206 hs_d3p 197.5 -696.5 27 vssa -11417.5 -696.5 87 vssd -7817.5 -696.5 147 db1 -3585 -696.5 207 hs_d3p 257.5 -696.5 28 vssa -11357.5 -696.5 88 vssd -7757.5 -696.5 148 db0 -3510 -696.5 208 hs_d3n 317.5 -696.5 29 vssa -11297.5 -696.5 89 vssd -7697.5 -696.5 149 te1 -3435 -696.5 209 hs_d3n 377.5 -696.5 30 vssa -11237.5 -696.5 90 vssd -7637.5 -696.5 150 te -3360 -696.5 210 hs_d3n 437.5 -696.5 31 vspr -11177.5 -696.5 91 vssd -7577.5 -696.5 151 cabc_pwm_ou t -3285 -696.5 211 hs_d3n 497.5 -696.5 32 vspr -11117.5 -696.5 92 vssd -7517.5 -696.5 152 iognddum -3210 -696.5 212 hs_vss 557.5 -696.5 33 vtestoutp -11057.5 -696.5 93 vssd -7457.5 -696.5 153 resx -3135 -696.5 213 hs_vss 617.5 -696.5 34 vspc -10997.5 -696.5 94 vssd -7397.5 -696.5 154 bs0 -3060 -696.5 214 hs_vss 677.5 -696.5 35 vspc -10937.5 -696.5 95 vssd -7337.5 -696.5 155 bs1 -2985 -696.5 215 hs_vss 737.5 -696.5 36 vsnr -10877.5 -696.5 96 vssd -7277.5 -696.5 156 bs2 -2910 -696.5 216 hs_ldo 797.5 -696.5 37 vsnr -10817.5 -696.5 97 vssd -7217.5 -696.5 157 bs3 -2835 -696.5 217 hs_ldo 857.5 -696.5 38 vtestoutn -10757.5 -696.5 98 vssd -7157.5 -696.5 158 test2 -2760 -696.5 218 hs_ldo 917.5 -696.5 39 vdd2 -10697.5 -696.5 99 vdd1 -7097.5 -696.5 159 test1 -2685 -696.5 219 hs_ldo 977.5 -696.5 40 vdd2 -10637.5 -696.5 100 vdd1 -7037.5 -696.5 160 test0 -2610 -696.5 220 hs_vcc 1037.5 -696.5 41 vssac -10577.5 -696.5 101 vdd1 -6977.5 -696.5 161 dummy -2535 -696.5 221 hs_vcc 1097.5 -696.5 42 vssac -10517.5 -696.5 102 vdd1 -6917.5 -696.5 162 hs_vss -2442.5 -696.5 222 hs_vcc 1157.5 -696.5 43 vssac -10457.5 -696.5 103 vdd1 -6857.5 -696.5 163 hs_vss -2382.5 -696.5 223 hs_vcc 1217.5 -696.5 44 vssac -10397.5 -696.5 104 vdd1 -6797.5 -696.5 164 hs_vss -2322.5 -696.5 224 dummy 1277.5 -696.5 45 vssac -10337.5 -696.5 105 vdd1 -6737.5 -696.5 165 hs_vss -2262.5 -696.5 225 vcl 1337.5 -696.5 46 vssac -10277.5 -696.5 106 pvctl_a1 -6660 -696.5 166 hs_vss -2202.5 -696.5 226 vcl 1397.5 -696.5 47 vref -10217.5 -696.5 107 pvctl_a2 -6585 -696.5 167 hs_vss -2142.5 -696.5 227 vcl 1457.5 -696.5 48 vref -10157.5 -696.5 108 pvctl_b1 -6510 -696.5 168 hs_d2p -2082.5 -696.5 228 vcl 1517.5 -696.5 49 vssd -10097.5 -696.5 109 pvctl_b2 -6435 -696.5 169 hs_d2p -2022.5 -696.5 229 c41n 1577.5 -696.5 50 vssd -10037.5 -696.5 110 osc -6360 -696.5 170 hs_d2p -1962.5 -696.5 230 c41n 1637.5 -696.5 51 vssd -9977.5 -696.5 111 pclk -6285 -696.5 171 hs_d2p -1902.5 -696.5 231 c41n 1697.5 -696.5 52 vssd -9917.5 -696.5 112 de -6210 -696.5 172 hs_d2n -1842.5 -696.5 232 c41n 1757.5 -696.5 53 vssd -9857.5 -696.5 113 hsync -6135 -696.5 173 hs_d2n -1782.5 -696.5 233 c42n 1817.5 -696.5 54 vssd -9797.5 -696.5 114 vsync -6060 -696.5 174 hs_d2n -1722.5 -696.5 234 c42n 1877.5 -696.5 55 vssd -9737.5 -696.5 115 sdo -5985 -696.5 175 hs_d2n -1662.5 -696.5 235 c42n 1937.5 -696.5 56 vssd -9677.5 -696.5 116 sdi -5910 -696.5 176 hs_vss -1602.5 -696.5 236 c42n 1997.5 -696.5 57 vdddn -9617.5 -696.5 117 iognddum -5835 -696.5 177 hs_d1p -1542.5 -696.5 237 c42p 2057.5 -696.5 58 vdddn -9557.5 -696.5 118 csx -5760 -696.5 178 hs_d1p -1482.5 -696.5 238 c42p 2117.5 -696.5 59 vdddn -9497.5 -696.5 119 dcx -5685 -696.5 179 hs_d1p -1422.5 -696.5 239 c42p 2177.5 -696.5 60 vdddn -9437.5 -696.5 120 wrx_scl -5610 -696.5 180 hs_d1p -1362.5 -696.5 240 c42p 2237.5 -696.5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.19- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 no. name x y no. name x y no. name x y no. name x y 241 c41p 2297.5 -696.5 301 vsp 5897.5 -696.5 361 vsn 9497.5 -696.5 421 dummy 12711 703.5 242 c41p 2357.5 -696.5 302 vsp 5957.5 -696.5 362 vsn 9557.5 -696.5 422 vcom 12641 703.5 243 c41p 2417.5 -696.5 303 vsp 6017.5 -696.5 363 vsn 9617.5 -696.5 423 vcom 12571 703.5 244 c41p 2477.5 -696.5 304 vsp 6077.5 -696.5 364 vsn 9677.5 -696.5 424 vcom 12501 703.5 245 c11p 2537.5 -696.5 305 c15n 6137.5 -696.5 365 vpp 9737.5 -696.5 425 vcom 12431 703.5 246 c11p 2597.5 -696.5 306 c15n 6197.5 -696.5 366 vpp 9797.5 -696.5 426 vcom 12361 703.5 247 c11p 2657.5 -696.5 307 c15n 6257.5 -696.5 367 c24n 9857.5 -696.5 427 vcom 12291 703.5 248 c11p 2717.5 -696.5 308 c15n 6317.5 -696.5 368 c24n 9917.5 -696.5 428 vgl 12221 703.5 249 c12p 2777.5 -696.5 309 c16n 6377.5 -696.5 369 c24n 9977.5 -696.5 429 vgl 12151 703.5 250 c12p 2837.5 -696.5 310 c16n 6437.5 -696.5 370 c24n 10037.5 -696.5 430 vgl 12081 703.5 251 c12p 2897.5 -696.5 311 c16n 6497.5 -696.5 371 c24p 10097.5 -696.5 431 vgh_l 12011 703.5 252 c12p 2957.5 -696.5 312 c16n 6557.5 -696.5 372 c24p 10157.5 -696.5 432 vgh_l 11941 703.5 253 c13p 3017.5 -696.5 313 c17n 6617.5 -696.5 373 c24p 10217.5 -696.5 433 vgh_l 11871 703.5 254 c13p 3077.5 -696.5 314 c17n 6677.5 -696.5 374 c24p 10277.5 -696.5 434 gck1_l 11801 703.5 255 c13p 3137.5 -696.5 315 c17n 6737.5 -696.5 375 c23n 10337.5 -696.5 435 gck2_l 11731 703.5 256 c13p 3197.5 -696.5 316 c17n 6797.5 -696.5 376 c23n 10397.5 -696.5 436 gck3_l 11661 703.5 257 c14p 3257.5 -696.5 317 c18n 6857.5 -696.5 377 c23n 10457.5 -696.5 437 gck4_l 11591 703.5 258 c14p 3317.5 -696.5 318 c18n 6917.5 -696.5 378 c23n 10517.5 -696.5 438 gck5_l 11521 703.5 259 c14p 3377.5 -696.5 319 c18n 6977.5 -696.5 379 c23p 10577.5 -696.5 439 gck6_l 11451 703.5 260 c14p 3437.5 -696.5 320 c18n 7037.5 -696.5 380 c23p 10637.5 -696.5 440 gck7_l 11381 703.5 261 c14n 3497.5 -696.5 321 c18p 7097.5 -696.5 381 c23p 10697.5 -696.5 441 gck8_l 11311 703.5 262 c14n 3557.5 -696.5 322 c18p 7157.5 -696.5 382 c23p 10757.5 -696.5 442 dummy 11241 703.5 263 c14n 3617.5 -696.5 323 c18p 7217.5 -696.5 383 c22n 10817.5 -696.5 443 dummy 11171 703.5 264 c14n 3677.5 -696.5 324 c18p 7277.5 -696.5 384 c22n 10877.5 -696.5 444 dummy 11101 703.5 265 c13n 3737.5 -696.5 325 c17p 7337.5 -696.5 385 c22n 10937.5 -696.5 445 dummy 11031 703.5 266 c13n 3797.5 -696.5 326 c17p 7397.5 -696.5 386 c22n 10997.5 -696.5 446 dummy 10961 703.5 267 c13n 3857.5 -696.5 327 c17p 7457.5 -696.5 387 c22p 11057.5 -696.5 447 dummy 10891 703.5 268 c13n 3917.5 -696.5 328 c17p 7517.5 -696.5 388 c22p 11117.5 -696.5 448 dummy 10821 703.5 269 c12n 3977.5 -696.5 329 c16p 7577.5 -696.5 389 c22p 11177.5 -696.5 449 dummy 10751 703.5 270 c12n 4037.5 -696.5 330 c16p 7637.5 -696.5 390 c22p 11237.5 -696.5 450 dummy 10681 703.5 271 c12n 4097.5 -696.5 331 c16p 7697.5 -696.5 391 c21n 11297.5 -696.5 451 dummy 10611 703.5 272 c12n 4157.5 -696.5 332 c16p 7757.5 -696.5 392 c21n 11357.5 -696.5 452 ud_l 10541 703.5 273 c11n 4217.5 -696.5 333 c15p 7817.5 -696.5 393 c21n 11417.5 -696.5 453 gsp_l 10471 703.5 274 c11n 4277.5 -696.5 334 c15p 7877.5 -696.5 394 c21n 11477.5 -696.5 454 init_l 10401 703.5 275 c11n 4337.5 -696.5 335 c15p 7937.5 -696.5 395 c21p 11537.5 -696.5 455 sw3_l 10331 703.5 276 c11n 4397.5 -696.5 336 c15p 7997.5 -696.5 396 c21p 11597.5 -696.5 456 sw2_l 10261 703.5 277 vdd3 4457.5 -696.5 337 vssd 8057.5 -696.5 397 c21p 11657.5 -696.5 457 sw1_l 10191 703.5 278 vdd3 4517.5 -696.5 338 vssd 8117.5 -696.5 398 c21p 11717.5 -696.5 458 sw1b_l 10121 703.5 279 vdd3 4577.5 -696.5 339 vssd 8177.5 -696.5 399 vgh 11777.5 -696.5 459 sw2b_l 10051 703.5 280 vdd3 4637.5 -696.5 340 vssd 8237.5 -696.5 400 vgh 11837.5 -696.5 460 sw3b_l 9981 703.5 281 vdd3 4697.5 -696.5 341 vssd 8297.5 -696.5 401 vgh 11897.5 -696.5 461 dummy 9911 703.5 282 vdd3 4757.5 -696.5 342 vssd 8357.5 -696.5 402 vgh 11957.5 -696.5 462 dummy 9893 613.5 283 vdd3 4817.5 -696.5 343 c31p 8417.5 -696.5 403 vgl 12017.5 -696.5 463 dummy 9875 703.5 284 vdd3 4877.5 -696.5 344 c31p 8477.5 -696.5 404 vgl 12077.5 -696.5 464 dummy 9857 613.5 285 vdd3 4937.5 -696.5 345 c31p 8537.5 -696.5 405 vgl 12137.5 -696.5 465 dummy 9839 703.5 286 vdd3 4997.5 -696.5 346 c31p 8597.5 -696.5 406 vgl 12197.5 -696.5 466 dummy 9821 613.5 287 vdd3 5057.5 -696.5 347 c31n 8657.5 -696.5 407 vssa 12257.5 -696.5 467 dummy 9803 703.5 288 vdd3 5117.5 -696.5 348 c31n 8717.5 -696.5 408 vssa 12317.5 -696.5 468 dummy 9785 613.5 289 vssd 5177.5 -696.5 349 c31n 8777.5 -696.5 409 vssa 12377.5 -696.5 469 dummy 9767 703.5 290 vssd 5237.5 -696.5 350 c31n 8837.5 -696.5 410 vssa 12437.5 -696.5 470 dummy 9749 613.5 291 vssd 5297.5 -696.5 351 c32p 8897.5 -696.5 411 vssa 12497.5 -696.5 471 dummy 9731 703.5 292 vssd 5357.5 -696.5 352 c32p 8957.5 -696.5 412 vssa 12557.5 -696.5 472 dummy 9713 613.5 293 vssd 5417.5 -696.5 353 c32p 9017.5 -696.5 413 dummyr2 12617.5 -696.5 473 dummy 9695 703.5 294 vssd 5477.5 -696.5 354 c32p 9077.5 -696.5 414 dummyr1 12677.5 -696.5 474 dummy 9677 613.5 295 vsp 5537.5 -696.5 355 c32n 9137.5 -696.5 415 vcom 12737.5 -696.5 475 dummy 9659 703.5 296 vsp 5597.5 -696.5 356 c32n 9197.5 -696.5 416 vcom 12797.5 -696.5 476 dummy 9641 613.5 297 vsp 5657.5 -696.5 357 c32n 9257.5 -696.5 417 vcom 12857.5 -696.5 477 dummy 9623 703.5 298 vsp 5717.5 -696.5 358 c32n 9317.5 -696.5 418 vcom 12917.5 -696.5 478 s800 9605 613.5 299 vsp 5777.5 -696.5 359 vsn 9377.5 -696.5 419 dummy 12977.5 -696.5 479 s799 9587 703.5 300 vsp 5837.5 -696.5 360 vsn 9437.5 -696.5 420 dummy 12781 703.5 480 s798 9569 613.5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.20- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 no. name x y no. name x y no. name x y no. name x y 481 s797 9551 703.5 541 s737 8471 703.5 601 s677 7391 703.5 661 s617 6311 703.5 482 s796 9533 613.5 542 s736 8453 613.5 602 s676 7373 613.5 662 s616 6293 613.5 483 s795 9515 703.5 543 s735 8435 703.5 603 s675 7355 703.5 663 s615 6275 703.5 484 s794 9497 613.5 544 s734 8417 613.5 604 s674 7337 613.5 664 s614 6257 613.5 485 s793 9479 703.5 545 s733 8399 703.5 605 s673 7319 703.5 665 s613 6239 703.5 486 s792 9461 613.5 546 s732 8381 613.5 606 s672 7301 613.5 666 s612 6221 613.5 487 s791 9443 703.5 547 s731 8363 703.5 607 s671 7283 703.5 667 s611 6203 703.5 488 s790 9425 613.5 548 s730 8345 613.5 608 s670 7265 613.5 668 s610 6185 613.5 489 s789 9407 703.5 549 s729 8327 703.5 609 s669 7247 703.5 669 s609 6167 703.5 490 s788 9389 613.5 550 s728 8309 613.5 610 s668 7229 613.5 670 s608 6149 613.5 491 s787 9371 703.5 551 s727 8291 703.5 611 s667 7211 703.5 671 s607 6131 703.5 492 s786 9353 613.5 552 s726 8273 613.5 612 s666 7193 613.5 672 s606 6113 613.5 493 s785 9335 703.5 553 s725 8255 703.5 613 s665 7175 703.5 673 s605 6095 703.5 494 s784 9317 613.5 554 s724 8237 613.5 614 s664 7157 613.5 674 s604 6077 613.5 495 s783 9299 703.5 555 s723 8219 703.5 615 s663 7139 703.5 675 s603 6059 703.5 496 s782 9281 613.5 556 s722 8201 613.5 616 s662 7121 613.5 676 s602 6041 613.5 497 s781 9263 703.5 557 s721 8183 703.5 617 s661 7103 703.5 677 s601 6023 703.5 498 s780 9245 613.5 558 s720 8165 613.5 618 s660 7085 613.5 678 dummy 6005 613.5 499 s779 9227 703.5 559 s719 8147 703.5 619 s659 7067 703.5 679 dummy 5987 703.5 500 s778 9209 613.5 560 s718 8129 613.5 620 s658 7049 613.5 680 dummy 5969 613.5 501 s777 9191 703.5 561 s717 8111 703.5 621 s657 7031 703.5 681 dummy 5951 703.5 502 s776 9173 613.5 562 s716 8093 613.5 622 s656 7013 613.5 682 dummy 5933 613.5 503 s775 9155 703.5 563 s715 8075 703.5 623 s655 6995 703.5 683 dummy 5915 703.5 504 s774 9137 613.5 564 s714 8057 613.5 624 s654 6977 613.5 684 dummy 5897 613.5 505 s773 9119 703.5 565 s713 8039 703.5 625 s653 6959 703.5 685 dummy 5879 703.5 506 s772 9101 613.5 566 s712 8021 613.5 626 s652 6941 613.5 686 dummy 5861 613.5 507 s771 9083 703.5 567 s711 8003 703.5 627 s651 6923 703.5 687 dummy 5843 703.5 508 s770 9065 613.5 568 s710 7985 613.5 628 s650 6905 613.5 688 dummy 5825 613.5 509 s769 9047 703.5 569 s709 7967 703.5 629 s649 6887 703.5 689 dummy 5807 703.5 510 s768 9029 613.5 570 s708 7949 613.5 630 s648 6869 613.5 690 dummy 5789 613.5 511 s767 9011 703.5 571 s707 7931 703.5 631 s647 6851 703.5 691 dummy 5771 703.5 512 s766 8993 613.5 572 s706 7913 613.5 632 s646 6833 613.5 692 dummy 5753 613.5 513 s765 8975 703.5 573 s705 7895 703.5 633 s645 6815 703.5 693 dummy 5735 703.5 514 s764 8957 613.5 574 s704 7877 613.5 634 s644 6797 613.5 694 s600 5717 613.5 515 s763 8939 703.5 575 s703 7859 703.5 635 s643 6779 703.5 695 s599 5699 703.5 516 s762 8921 613.5 576 s702 7841 613.5 636 s642 6761 613.5 696 s598 5681 613.5 517 s761 8903 703.5 577 s701 7823 703.5 637 s641 6743 703.5 697 s597 5663 703.5 518 s760 8885 613.5 578 s700 7805 613.5 638 s640 6725 613.5 698 s596 5645 613.5 519 s759 8867 703.5 579 s699 7787 703.5 639 s639 6707 703.5 699 s595 5627 703.5 520 s758 8849 613.5 580 s698 7769 613.5 640 s638 6689 613.5 700 s594 5609 613.5 521 s757 8831 703.5 581 s697 7751 703.5 641 s637 6671 703.5 701 s593 5591 703.5 522 s756 8813 613.5 582 s696 7733 613.5 642 s636 6653 613.5 702 s592 5573 613.5 523 s755 8795 703.5 583 s695 7715 703.5 643 s635 6635 703.5 703 s591 5555 703.5 524 s754 8777 613.5 584 s694 7697 613.5 644 s634 6617 613.5 704 s590 5537 613.5 525 s753 8759 703.5 585 s693 7679 703.5 645 s633 6599 703.5 705 s589 5519 703.5 526 s752 8741 613.5 586 s692 7661 613.5 646 s632 6581 613.5 706 s588 5501 613.5 527 s751 8723 703.5 587 s691 7643 703.5 647 s631 6563 703.5 707 s587 5483 703.5 528 s750 8705 613.5 588 s690 7625 613.5 648 s630 6545 613.5 708 s586 5465 613.5 529 s749 8687 703.5 589 s689 7607 703.5 649 s629 6527 703.5 709 s585 5447 703.5 530 s748 8669 613.5 590 s688 7589 613.5 650 s628 6509 613.5 710 s584 5429 613.5 531 s747 8651 703.5 591 s687 7571 703.5 651 s627 6491 703.5 711 s583 5411 703.5 532 s746 8633 613.5 592 s686 7553 613.5 652 s626 6473 613.5 712 s582 5393 613.5 533 s745 8615 703.5 593 s685 7535 703.5 653 s625 6455 703.5 713 s581 5375 703.5 534 s744 8597 613.5 594 s684 7517 613.5 654 s624 6437 613.5 714 s580 5357 613.5 535 s743 8579 703.5 595 s683 7499 703.5 655 s623 6419 703.5 715 s579 5339 703.5 536 s742 8561 613.5 596 s682 7481 613.5 656 s622 6401 613.5 716 s578 5321 613.5 537 s741 8543 703.5 597 s681 7463 703.5 657 s621 6383 703.5 717 s577 5303 703.5 538 s740 8525 613.5 598 s680 7445 613.5 658 s620 6365 613.5 718 s576 5285 613.5 539 s739 8507 703.5 599 s679 7427 703.5 659 s619 6347 703.5 719 s575 5267 703.5 540 s738 8489 613.5 600 s678 7409 613.5 660 s618 6329 613.5 720 s574 5249 613.5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.21- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 no. name x y no. name x y no. name x y no. name x y 721 s573 5231 703.5 781 s513 4151 703.5 841 s453 3071 703.5 901 dummy 1991 703.5 722 s572 5213 613.5 782 s512 4133 613.5 842 s452 3053 613.5 902 dummy 1925 703.5 723 s571 5195 703.5 783 s511 4115 703.5 843 s451 3035 703.5 903 dummy 1855 703.5 724 s570 5177 613.5 784 s510 4097 613.5 844 s450 3017 613.5 904 dummy 1785 703.5 725 s569 5159 703.5 785 s509 4079 703.5 845 s449 2999 703.5 905 dummy 1715 703.5 726 s568 5141 613.5 786 s508 4061 613.5 846 s448 2981 613.5 906 dummy 1645 703.5 727 s567 5123 703.5 787 s507 4043 703.5 847 s447 2963 703.5 907 dummy 1575 703.5 728 s566 5105 613.5 788 s506 4025 613.5 848 s446 2945 613.5 908 dummy 1505 703.5 729 s565 5087 703.5 789 s505 4007 703.5 849 s445 2927 703.5 909 dummy 1435 703.5 730 s564 5069 613.5 790 s504 3989 613.5 850 s444 2909 613.5 910 dummy 1365 703.5 731 s563 5051 703.5 791 s503 3971 703.5 851 s443 2891 703.5 911 dummy 1295 703.5 732 s562 5033 613.5 792 s502 3953 613.5 852 s442 2873 613.5 912 dummy 1225 703.5 733 s561 5015 703.5 793 s501 3935 703.5 853 s441 2855 703.5 913 dummy 1155 703.5 734 s560 4997 613.5 794 s500 3917 613.5 854 s440 2837 613.5 914 dummy 1085 703.5 735 s559 4979 703.5 795 s499 3899 703.5 855 s439 2819 703.5 915 dummy 1015 703.5 736 s558 4961 613.5 796 s498 3881 613.5 856 s438 2801 613.5 916 dummy 945 703.5 737 s557 4943 703.5 797 s497 3863 703.5 857 s437 2783 703.5 917 dummy 875 703.5 738 s556 4925 613.5 798 s496 3845 613.5 858 s436 2765 613.5 918 dummy 805 703.5 739 s555 4907 703.5 799 s495 3827 703.5 859 s435 2747 703.5 919 dummy 735 703.5 740 s554 4889 613.5 800 s494 3809 613.5 860 s434 2729 613.5 920 dummy 665 703.5 741 s553 4871 703.5 801 s493 3791 703.5 861 s433 2711 703.5 921 dummy 595 703.5 742 s552 4853 613.5 802 s492 3773 613.5 862 s432 2693 613.5 922 dummy 525 703.5 743 s551 4835 703.5 803 s491 3755 703.5 863 s431 2675 703.5 923 dummy 455 703.5 744 s550 4817 613.5 804 s490 3737 613.5 864 s430 2657 613.5 924 dummy 385 703.5 745 s549 4799 703.5 805 s489 3719 703.5 865 s429 2639 703.5 925 dummy 315 703.5 746 s548 4781 613.5 806 s488 3701 613.5 866 s428 2621 613.5 926 dummy 245 703.5 747 s547 4763 703.5 807 s487 3683 703.5 867 s427 2603 703.5 927 dummy 175 703.5 748 s546 4745 613.5 808 s486 3665 613.5 868 s426 2585 613.5 928 dummy 105 703.5 749 s545 4727 703.5 809 s485 3647 703.5 869 s425 2567 703.5 929 dummy 35 703.5 750 s544 4709 613.5 810 s484 3629 613.5 870 s424 2549 613.5 930 dummy -35 703.5 751 s543 4691 703.5 811 s483 3611 703.5 871 s423 2531 703.5 931 dummy -105 703.5 752 s542 4673 613.5 812 s482 3593 613.5 872 s422 2513 613.5 932 dummy -175 703.5 753 s541 4655 703.5 813 s481 3575 703.5 873 s421 2495 703.5 933 dummy -245 703.5 754 s540 4637 613.5 814 s480 3557 613.5 874 s420 2477 613.5 934 dummy -315 703.5 755 s539 4619 703.5 815 s479 3539 703.5 875 s419 2459 703.5 935 dummy -385 703.5 756 s538 4601 613.5 816 s478 3521 613.5 876 s418 2441 613.5 936 dummy -455 703.5 757 s537 4583 703.5 817 s477 3503 703.5 877 s417 2423 703.5 937 dummy -525 703.5 758 s536 4565 613.5 818 s476 3485 613.5 878 s416 2405 613.5 938 dummy -595 703.5 759 s535 4547 703.5 819 s475 3467 703.5 879 s415 2387 703.5 939 dummy -665 703.5 760 s534 4529 613.5 820 s474 3449 613.5 880 s414 2369 613.5 940 dummy -735 703.5 761 s533 4511 703.5 821 s473 3431 703.5 881 s413 2351 703.5 941 dummy -805 703.5 762 s532 4493 613.5 822 s472 3413 613.5 882 s412 2333 613.5 942 dummy -875 703.5 763 s531 4475 703.5 823 s471 3395 703.5 883 s411 2315 703.5 943 dummy -945 703.5 764 s530 4457 613.5 824 s470 3377 613.5 884 s410 2297 613.5 944 dummy -1015 703.5 765 s529 4439 703.5 825 s469 3359 703.5 885 s409 2279 703.5 945 dummy -1085 703.5 766 s528 4421 613.5 826 s468 3341 613.5 886 s408 2261 613.5 946 dummy -1155 703.5 767 s527 4403 703.5 827 s467 3323 703.5 887 s407 2243 703.5 947 dummy -1225 703.5 768 s526 4385 613.5 828 s466 3305 613.5 888 s406 2225 613.5 948 dummy -1295 703.5 769 s525 4367 703.5 829 s465 3287 703.5 889 s405 2207 703.5 949 dummy -1365 703.5 770 s524 4349 613.5 830 s464 3269 613.5 890 s404 2189 613.5 950 dummy -1435 703.5 771 s523 4331 703.5 831 s463 3251 703.5 891 s403 2171 703.5 951 dummy -1505 703.5 772 s522 4313 613.5 832 s462 3233 613.5 892 s402 2153 613.5 952 dummy -1575 703.5 773 s521 4295 703.5 833 s461 3215 703.5 893 s401 2135 703.5 953 dummy -1645 703.5 774 s520 4277 613.5 834 s460 3197 613.5 894 dummy 2117 613.5 954 dummy -1715 703.5 775 s519 4259 703.5 835 s459 3179 703.5 895 dummy 2099 703.5 955 dummy -1785 703.5 776 s518 4241 613.5 836 s458 3161 613.5 896 dummy 2081 613.5 956 dummy -1855 703.5 777 s517 4223 703.5 837 s457 3143 703.5 897 dummy 2063 703.5 957 dummy -1925 703.5 778 s516 4205 613.5 838 s456 3125 613.5 898 dummy 2045 613.5 958 dummy -1991 613.5 779 s515 4187 703.5 839 s455 3107 703.5 899 dummy 2027 703.5 959 dummy -2009 703.5 780 s514 4169 613.5 840 s454 3089 613.5 900 dummy 2009 613.5 960 dummy -2027 613.5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.22- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 no. name x y no. name x y no. name x y no. name x y 961 dummy -2045 703.5 1021 s345 -3125 703.5 1081 s285 -4205 703.5 1141 s225 -5285 703.5 962 dummy -2063 613.5 1022 s344 -3143 613.5 1082 s284 -4223 613.5 1142 s224 -5303 613.5 963 dummy -2081 703.5 1023 s343 -3161 703.5 1083 s283 -4241 703.5 1143 s223 -5321 703.5 964 dummy -2099 613.5 1024 s342 -3179 613.5 1084 s282 -4259 613.5 1144 s222 -5339 613.5 965 dummy -2117 703.5 1025 s341 -3197 703.5 1085 s281 -4277 703.5 1145 s221 -5357 703.5 966 s400 -2135 613.5 1026 s340 -3215 613.5 1086 s280 -4295 613.5 1146 s220 -5375 613.5 967 s399 -2153 703.5 1027 s339 -3233 703.5 1087 s279 -4313 703.5 1147 s219 -5393 703.5 968 s398 -2171 613.5 1028 s338 -3251 613.5 1088 s278 -4331 613.5 1148 s218 -5411 613.5 969 s397 -2189 703.5 1029 s337 -3269 703.5 1089 s277 -4349 703.5 1149 s217 -5429 703.5 970 s396 -2207 613.5 1030 s336 -3287 613.5 1090 s276 -4367 613.5 1150 s216 -5447 613.5 971 s395 -2225 703.5 1031 s335 -3305 703.5 1091 s275 -4385 703.5 1151 s215 -5465 703.5 972 s394 -2243 613.5 1032 s334 -3323 613.5 1092 s274 -4403 613.5 1152 s214 -5483 613.5 973 s393 -2261 703.5 1033 s333 -3341 703.5 1093 s273 -4421 703.5 1153 s213 -5501 703.5 974 s392 -2279 613.5 1034 s332 -3359 613.5 1094 s272 -4439 613.5 1154 s212 -5519 613.5 975 s391 -2297 703.5 1035 s331 -3377 703.5 1095 s271 -4457 703.5 1155 s211 -5537 703.5 976 s390 -2315 613.5 1036 s330 -3395 613.5 1096 s270 -4475 613.5 1156 s210 -5555 613.5 977 s389 -2333 703.5 1037 s329 -3413 703.5 1097 s269 -4493 703.5 1157 s209 -5573 703.5 978 s388 -2351 613.5 1038 s328 -3431 613.5 1098 s268 -4511 613.5 1158 s208 -5591 613.5 979 s387 -2369 703.5 1039 s327 -3449 703.5 1099 s267 -4529 703.5 1159 s207 -5609 703.5 980 s386 -2387 613.5 1040 s326 -3467 613.5 1100 s266 -4547 613.5 1160 s206 -5627 613.5 981 s385 -2405 703.5 1041 s325 -3485 703.5 1101 s265 -4565 703.5 1161 s205 -5645 703.5 982 s384 -2423 613.5 1042 s324 -3503 613.5 1102 s264 -4583 613.5 1162 s204 -5663 613.5 983 s383 -2441 703.5 1043 s323 -3521 703.5 1103 s263 -4601 703.5 1163 s203 -5681 703.5 984 s382 -2459 613.5 1044 s322 -3539 613.5 1104 s262 -4619 613.5 1164 s202 -5699 613.5 985 s381 -2477 703.5 1045 s321 -3557 703.5 1105 s261 -4637 703.5 1165 s201 -5717 703.5 986 s380 -2495 613.5 1046 s320 -3575 613.5 1106 s260 -4655 613.5 1166 dummy -5735 613.5 987 s379 -2513 703.5 1047 s319 -3593 703.5 1107 s259 -4673 703.5 1167 dummy -5753 703.5 988 s378 -2531 613.5 1048 s318 -3611 613.5 1108 s258 -4691 613.5 1168 dummy -5771 613.5 989 s377 -2549 703.5 1049 s317 -3629 703.5 1109 s257 -4709 703.5 1169 dummy -5789 703.5 990 s376 -2567 613.5 1050 s316 -3647 613.5 1110 s256 -4727 613.5 1170 dummy -5807 613.5 991 s375 -2585 703.5 1051 s315 -3665 703.5 1111 s255 -4745 703.5 1171 dummy -5825 703.5 992 s374 -2603 613.5 1052 s314 -3683 613.5 1112 s254 -4763 613.5 1172 dummy -5843 613.5 993 s373 -2621 703.5 1053 s313 -3701 703.5 1113 s253 -4781 703.5 1173 dummy -5861 703.5 994 s372 -2639 613.5 1054 s312 -3719 613.5 1114 s252 -4799 613.5 1174 dummy -5879 613.5 995 s371 -2657 703.5 1055 s311 -3737 703.5 1115 s251 -4817 703.5 1175 dummy -5897 703.5 996 s370 -2675 613.5 1056 s310 -3755 613.5 1116 s250 -4835 613.5 1176 dummy -5915 613.5 997 s369 -2693 703.5 1057 s309 -3773 703.5 1117 s249 -4853 703.5 1177 dummy -5933 703.5 998 s368 -2711 613.5 1058 s308 -3791 613.5 1118 s248 -4871 613.5 1178 dummy -5951 613.5 999 s367 -2729 703.5 1059 s307 -3809 703.5 1119 s247 -4889 703.5 1179 dummy -5969 703.5 1000 s366 -2747 613.5 1060 s306 -3827 613.5 1120 s246 -4907 613.5 1180 dummy -5987 613.5 1001 s365 -2765 703.5 1061 s305 -3845 703.5 1121 s245 -4925 703.5 1181 dummy -6005 703.5 1002 s364 -2783 613.5 1062 s304 -3863 613.5 1122 s244 -4943 613.5 1182 s200 -6023 613.5 1003 s363 -2801 703.5 1063 s303 -3881 703.5 1123 s243 -4961 703.5 1183 s199 -6041 703.5 1004 s362 -2819 613.5 1064 s302 -3899 613.5 1124 s242 -4979 613.5 1184 s198 -6059 613.5 1005 s361 -2837 703.5 1065 s301 -3917 703.5 1125 s241 -4997 703.5 1185 s197 -6077 703.5 1006 s360 -2855 613.5 1066 s300 -3935 613.5 1126 s240 -5015 613.5 1186 s196 -6095 613.5 1007 s359 -2873 703.5 1067 s299 -3953 703.5 1127 s239 -5033 703.5 1187 s195 -6113 703.5 1008 s358 -2891 613.5 1068 s298 -3971 613.5 1128 s238 -5051 613.5 1188 s194 -6131 613.5 1009 s357 -2909 703.5 1069 s297 -3989 703.5 1129 s237 -5069 703.5 1189 s193 -6149 703.5 1010 s356 -2927 613.5 1070 s296 -4007 613.5 1130 s236 -5087 613.5 1190 s192 -6167 613.5 1011 s355 -2945 703.5 1071 s295 -4025 703.5 1131 s235 -5105 703.5 1191 s191 -6185 703.5 1012 s354 -2963 613.5 1072 s294 -4043 613.5 1132 s234 -5123 613.5 1192 s190 -6203 613.5 1013 s353 -2981 703.5 1073 s293 -4061 703.5 1133 s233 -5141 703.5 1193 s189 -6221 703.5 1014 s352 -2999 613.5 1074 s292 -4079 613.5 1134 s232 -5159 613.5 1194 s188 -6239 613.5 1015 s351 -3017 703.5 1075 s291 -4097 703.5 1135 s231 -5177 703.5 1195 s187 -6257 703.5 1016 s350 -3035 613.5 1076 s290 -4115 613.5 1136 s230 -5195 613.5 1196 s186 -6275 613.5 1017 s349 -3053 703.5 1077 s289 -4133 703.5 1137 s229 -5213 703.5 1197 s185 -6293 703.5 1018 s348 -3071 613.5 1078 s288 -4151 613.5 1138 s228 -5231 613.5 1198 s184 -6311 613.5 1019 s347 -3089 703.5 1079 s287 -4169 703.5 1139 s227 -5249 703.5 1199 s183 -6329 703.5 1020 s346 -3107 613.5 1080 s286 -4187 613.5 1140 s226 -5267 613.5 1200 s182 -6347 613.5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.23- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 no. name x y no. name x y no. name x y no. name x y 1201 s181 -6365 703.5 1261 s121 -7445 703.5 1321 s61 -8525 703.5 1381 s1 -9605 703.5 1202 s180 -6383 613.5 1262 s120 -7463 613.5 1322 s60 -8543 613.5 1382 dummy -9623 613.5 1203 s179 -6401 703.5 1263 s119 -7481 703.5 1323 s59 -8561 703.5 1383 dummy -9641 703.5 1204 s178 -6419 613.5 1264 s118 -7499 613.5 1324 s58 -8579 613.5 1384 dummy -9659 613.5 1205 s177 -6437 703.5 1265 s117 -7517 703.5 1325 s57 -8597 703.5 1385 dummy -9677 703.5 1206 s176 -6455 613.5 1266 s116 -7535 613.5 1326 s56 -8615 613.5 1386 dummy -9695 613.5 1207 s175 -6473 703.5 1267 s115 -7553 703.5 1327 s55 -8633 703.5 1387 dummy -9713 703.5 1208 s174 -6491 613.5 1268 s114 -7571 613.5 1328 s54 -8651 613.5 1388 dummy -9731 613.5 1209 s173 -6509 703.5 1269 s113 -7589 703.5 1329 s53 -8669 703.5 1389 dummy -9749 703.5 1210 s172 -6527 613.5 1270 s112 -7607 613.5 1330 s52 -8687 613.5 1390 dummy -9767 613.5 1211 s171 -6545 703.5 1271 s111 -7625 703.5 1331 s51 -8705 703.5 1391 dummy -9785 703.5 1212 s170 -6563 613.5 1272 s110 -7643 613.5 1332 s50 -8723 613.5 1392 dummy -9803 613.5 1213 s169 -6581 703.5 1273 s109 -7661 703.5 1333 s49 -8741 703.5 1393 dummy -9821 703.5 1214 s168 -6599 613.5 1274 s108 -7679 613.5 1334 s48 -8759 613.5 1394 dummy -9839 613.5 1215 s167 -6617 703.5 1275 s107 -7697 703.5 1335 s47 -8777 703.5 1395 dummy -9857 703.5 1216 s166 -6635 613.5 1276 s106 -7715 613.5 1336 s46 -8795 613.5 1396 dummy -9875 613.5 1217 s165 -6653 703.5 1277 s105 -7733 703.5 1337 s45 -8813 703.5 1397 dummy -9893 703.5 1218 s164 -6671 613.5 1278 s104 -7751 613.5 1338 s44 -8831 613.5 1398 sw3b_r -9963 703.5 1219 s163 -6689 703.5 1279 s103 -7769 703.5 1339 s43 -8849 703.5 1399 sw2b_r -10033 703.5 1220 s162 -6707 613.5 1280 s102 -7787 613.5 1340 s42 -8867 613.5 1400 sw1b_r -10103 703.5 1221 s161 -6725 703.5 1281 s101 -7805 703.5 1341 s41 -8885 703.5 1401 sw1_r -10173 703.5 1222 s160 -6743 613.5 1282 s100 -7823 613.5 1342 s40 -8903 613.5 1402 sw2_r -10243 703.5 1223 s159 -6761 703.5 1283 s99 -7841 703.5 1343 s39 -8921 703.5 1403 sw3_r -10313 703.5 1224 s158 -6779 613.5 1284 s98 -7859 613.5 1344 s38 -8939 613.5 1404 init_r -10383 703.5 1225 s157 -6797 703.5 1285 s97 -7877 703.5 1345 s37 -8957 703.5 1405 gsp_r -10453 703.5 1226 s156 -6815 613.5 1286 s96 -7895 613.5 1346 s36 -8975 613.5 1406 ud_r -10523 703.5 1227 s155 -6833 703.5 1287 s95 -7913 703.5 1347 s35 -8993 703.5 1407 dummy -10593 703.5 1228 s154 -6851 613.5 1288 s94 -7931 613.5 1348 s34 -9011 613.5 1408 dummy -10663 703.5 1229 s153 -6869 703.5 1289 s93 -7949 703.5 1349 s33 -9029 703.5 1409 dummy -10733 703.5 1230 s152 -6887 613.5 1290 s92 -7967 613.5 1350 s32 -9047 613.5 1410 dummy -10803 703.5 1231 s151 -6905 703.5 1291 s91 -7985 703.5 1351 s31 -9065 703.5 1411 dummy -10873 703.5 1232 s150 -6923 613.5 1292 s90 -8003 613.5 1352 s30 -9083 613.5 1412 dummy -10943 703.5 1233 s149 -6941 703.5 1293 s89 -8021 703.5 1353 s29 -9101 703.5 1413 dummy -11013 703.5 1234 s148 -6959 613.5 1294 s88 -8039 613.5 1354 s28 -9119 613.5 1414 dummy -11083 703.5 1235 s147 -6977 703.5 1295 s87 -8057 703.5 1355 s27 -9137 703.5 1415 dummy -11153 703.5 1236 s146 -6995 613.5 1296 s86 -8075 613.5 1356 s26 -9155 613.5 1416 dummy -11223 703.5 1237 s145 -7013 703.5 1297 s85 -8093 703.5 1357 s25 -9173 703.5 1417 gck8_r -11293 703.5 1238 s144 -7031 613.5 1298 s84 -8111 613.5 1358 s24 -9191 613.5 1418 gck7_r -11363 703.5 1239 s143 -7049 703.5 1299 s83 -8129 703.5 1359 s23 -9209 703.5 1419 gck6_r -11433 703.5 1240 s142 -7067 613.5 1300 s82 -8147 613.5 1360 s22 -9227 613.5 1420 gck5_r -11503 703.5 1241 s141 -7085 703.5 1301 s81 -8165 703.5 1361 s21 -9245 703.5 1421 gck4_r -11573 703.5 1242 s140 -7103 613.5 1302 s80 -8183 613.5 1362 s20 -9263 613.5 1422 gck3_r -11643 703.5 1243 s139 -7121 703.5 1303 s79 -8201 703.5 1363 s19 -9281 703.5 1423 gck2_r -11713 703.5 1244 s138 -7139 613.5 1304 s78 -8219 613.5 1364 s18 -9299 613.5 1424 gck1_r -11783 703.5 1245 s137 -7157 703.5 1305 s77 -8237 703.5 1365 s17 -9317 703.5 1425 vgh_r -11853 703.5 1246 s136 -7175 613.5 1306 s76 -8255 613.5 1366 s16 -9335 613.5 1426 vgh_r -11923 703.5 1247 s135 -7193 703.5 1307 s75 -8273 703.5 1367 s15 -9353 703.5 1427 vgh_r -11993 703.5 1248 s134 -7211 613.5 1308 s74 -8291 613.5 1368 s14 -9371 613.5 1428 vgl -12063 703.5 1249 s133 -7229 703.5 1309 s73 -8309 703.5 1369 s13 -9389 703.5 1429 vgl -12133 703.5 1250 s132 -7247 613.5 1310 s72 -8327 613.5 1370 s12 -9407 613.5 1430 vgl -12203 703.5 1251 s131 -7265 703.5 1311 s71 -8345 703.5 1371 s11 -9425 703.5 1431 vcom -12273 703.5 1252 s130 -7283 613.5 1312 s70 -8363 613.5 1372 s10 -9443 613.5 1432 vcom -12343 703.5 1253 s129 -7301 703.5 1313 s69 -8381 703.5 1373 s9 -9461 703.5 1433 vcom -12413 703.5 1254 s128 -7319 613.5 1314 s68 -8399 613.5 1374 s8 -9479 613.5 1434 vcom -12483 703.5 1255 s127 -7337 703.5 1315 s67 -8417 703.5 1375 s7 -9497 703.5 1435 vcom -12553 703.5 1256 s126 -7355 613.5 1316 s66 -8435 613.5 1376 s6 -9515 613.5 1436 vcom -12623 703.5 1257 s125 -7373 703.5 1317 s65 -8453 703.5 1377 s5 -9533 703.5 1437 dummy -12693 703.5 1258 s124 -7391 613.5 1318 s64 -8471 613.5 1378 s4 -9551 613.5 1438 dummy -12763 703.5 1259 s123 -7409 703.5 1319 s63 -8489 703.5 1379 s3 -9569 703.5 1260 s122 -7427 613.5 1320 s62 -8507 613.5 1380 s2 -9587 613.5 alignment mark x y a+ -12999 679 a- 12999 679 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.24- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 3.4.1 bump arrangement input pad (no.1 ~ 106, no.162 ~419) 87 input pad (no.107 ~161) 87 output pad (no.462 ~ 901, no.958 ~ 1397) 16 18 output pad (no.420 ~461, no.902 ~957, no.1398 ~ 1438) 16 70 unit: um ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.25- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 3.4.2 alignment mark ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.26- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4. interface 4.1 interface select the HX8392-A supports dsi (display serial interface ). the interface mode can be selected by bs3-0 pins se tting as show in table 4.1. bs3 bs2 bs1 bs0 interface display data display mode 0 1 1 0 0 1 1 1 dsi i/f dsi i/f / gram type 1/3 other setting not open, only for internal test - - table 4.1: interface selection interface rdx wrx_scl dcx d23Cd0 or other input pin dsi (display serial interface) unused unused unused hs_cp, hs_cn, hs_d0p, hs_d0n, hs_d1p, ds_d1n, hs_d2p, ds_d2n, hs_d3p, ds_d3n table 4.2: pin connection based on different interf ace ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.27- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2 dsi system interface the selection of interface is by bs(3-0) =0110 o r 0111, the dsi specifies the interface between a host processor and a peripheral such as a display module. figure 4.1 shows a simplified dsi interface. from a concep tual viewpoint, a dsi-compliant interface also sends pixels or commands to the peri pheral, and can read back status or pixel information from the peripheral. the main difference is that dsi serializes all pixel data, commands, and events that. dsi-complian t peripherals support command mode. which mode is used depends on the architectur e and capabilities of the peripheral. the mode definitions reflect the primar y intended use of dsi for display. command mode refers to operation in which transacti ons primarily take the form of sending commands and data to a peripheral, such as a display module, that incorporates a display controller. the display cont roller may include local registers and a frame buffer. systems using command mode writ e to, and read from, the registers and frame buffer memory. the host process or indirectly controls activity at the peripheral by sending commands, parameters and data to the display controller. the host processor can also read display module sta tus information or the contents of the frame memory. command mode operation requires a bidirectional interface. figure 4.1: dsi transmitter and receiver interface please refer to draft mipi alliance standard for dsi for dsi detailed specifications. the data lane number select by internal register(rb ah). ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.28- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2.1 dsi layer definitions according figure 4.2 dsi transmitter and receiver i nterface to understand simple interface block diagram. then under diagram is inte rnal block for dsi which include four layers, phy layer, lane management layer, low level protocol and application layer. the phy layer specifies the characteristics of tran smission medium and electrical parameters for signaling the timing relationship be tween clock and data lanes. the lane management layer specifies dsi is lane-sca lable for increased performance. the data signals maybe transmission th rough one or more channel depending on the bandwidth requirements of the appl ication. the protocol layer specifies at the lowest level, d si protocol specifies the sequence and value of bits and bytes traversing the interfac e. it specifies how bytes are organized into defined groups called packets. the application layer describes higher-level encodi ng and interpretation of data contained in the data stream. the dsi specification describes the mapping of pixel values, commands and commands parameters to bytes in the packet assembly. 8-bits 8-bits 8-bits 8-bits control control pixel pixel control pixel control pixel control pixel to byte packing formats command generation / interpretation data0 high speed unidirectional clock - start of packet / end of pack serializer / desserializer colock management (ddr) electrical layer (slvs) lane 0 high speed unidirectional data (optionally bidirection al in lp mode) data control data control packet based protocol ecc and checksum generation and testing data control data control data control data control data control data control 8-bits 8-bits 8-bits 8-bits tx: distribute data to 1, 2, 3 or 4 lanes lane distribution and merging lane 1 high speed unidirectional data lane 2 high speed unidirectional data lane 3 high speed unidirectional data figure 4.2: dsi transmitter and receiver interface ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.29- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2.2 dsi protocol the protocol layer appends packet-protocol informat ion and headers. the receiver side of a dsi link performs the converse of the tra nsmitter side, decomposing the packet into parallel data, signal events and comman ds. the dsi protocol permits multiple packets which is useful for events such as peripheral initialization, where many registers may be loaded separate write command s at system startup. figure 4.3 illustrates multiple hs transmission packets. lps low power state sot start of transmission sp short packet lgp long packet eot end of transmission figure 4.3: multiple packets transmission the packet includes two types which are long packet and short packet. the first byte of the packet, the data identifier (di), includes i nformation specifying the type of the packet. command mode systems send commands and an a ssociated set of parameters, with the number of parameters depending on the command type. short packets are four bytes in length including the ecc. short packet is used for most command mode commands and associated parameter s. where short packets format include an 8-bit data id followed by two com mand or data and an 8-bit ecc. figure 4.4 shows the structure of the short packet. data id data 0 data 1 ecc lps lps eot sot packet header (ph) di(data id) contain virtual channel identifier and data type. ecc(error correction code) the error correction code allows single-bit errors to be corrected and 2-bit errors to be detected in the short packet. figure 4.4: structure of the short packet ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.30- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 long packets specify the payload length using a two-byte word c ount field and then the payload maybe from 0 to 65,5 35 bytes in length. long packets permit transmission of large blocks of pixel or other data . figure 4.5 shows the structure of the long packet. long packet header composed of thr ee elements: an 8-bit data identifier, a 16-bit word count, and 8-bit ecc. an application-specific data payload has word count * bytes following the packet header. the packet footer has one element, a 16-bit checksum. long packets can be fro m 6 to 65,541 bytes in length. where 65,541 bytes = 4 bytes ph + (2 16 -1)bytes payload + 2 bytes pf di (data id) contain virtual channel identifier and data type. wc (word count) the receiver use wc to determine the packet end. ecc (error correction code) the error correction code allows single-bit errors to be corrected and 2-bit errors to be detected in the packet header. pf(packet footer) mean 16-bit checksum. figure 4.5: structure of the long packet according to packet form, basic elements include di and ecc. figure 4.6 the shows format of data id. di7 di6 di5 di4 di3 di2 di1 di0 vc (virtual channel) dt (data type) di[7:6] these two bits identify the data as directed to on e of four virtual channels. di[5:0]: these six bits specify the data type. figure 4.6: the format of data id. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.31- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 due to data type (dt) mean format of transmission t ype, figure 4.7 show short- / long-packet transmission command sequence. long packet write command / parameters / pixel data s short packet write command / parameters figure 4.7: show short- / long-packet transmission command sequence ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.32- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2.3 processor to peripheral (forward direction) p ackets data types the set of transaction types sent from the host pro cessor to a peripheral, such as a display module, are shown in table 4.3 data types f or processor-sourced packets. data type, hex data type, binary description packet size 01h 00 0001 sync event, v sync start short 11h 01 0001 sync event, v sync end short 21h 10 0001 sync event, h sync start short 31h 11 0001 sync event, h sync end short 08h 00 1000 end of transmission packet(eotp) short 05h 000101 dcs write, no parameter short 15h 010101 dcs write, 1 parameter short 06h 00 0110 dcs read, no parameters short 37h 11 0111 set maximum return packet size short 09h 00 1001 null packet, no data long 19h 01 1001 blanking packet, no data long 39h 11 1001 dcs long write/write_lut command packet long 0eh 00 1110 packed pixel stream, 16-bit rgb, 5-6-5 format long 1eh 01 1110 packed pixel stream, 18-bit rgb, 6-6-6 format long 2eh 10 1110 loosely packed pixel stream, 18-bit rgb, 6-6-6 format long 3eh 11 1110 packed pixel stream, 24-bit rgb, 8-8-8 format long x0h and xfh, unspecified xx 0000 xx 1111 do not use all unspecified codes are reserved - table 4.3: data types for processor-sourced packets ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.33- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 under tables list all detail function of all data t ypes sync event (h start, h end, v start, v end), data t ype=xx 0001 (x1h) data type, hex function description number of bytes 01h v sync start, start of vsa pulse. 11h v sync end, end of vsa pulse. 21h h sync start, start of hsa pulse. 31h h sync end, end of hsa pulse. 4 bytes (di+00h+00h+ecc) note: v sync start and v sync end event represents the start an d end of the vsa, respectively. similarly h sync start and h sync end event represents the start and end of the hsa, respectively. display status (shutdown command, turn-on command ) data type, hex function description number of bytes 22h shutdown peripheral command that turns off the disp lay in a video mode display for power saving. 32h turn on peripheral command that turns on the displa y in video mode display for normal display. 4 bytes (di+00h+00h +ecc) note : when use shutdown command, interface shall remain powered in order to receive the turn-on, or wake-u p, command. dcs command setting data type, hex function description number of bytes 06h dcs read command, the returned data shall be long p acket format. 4 bytes (di+data0+data1+ecc) 05h and 15h dcs short write command, 0 or 1 paramet er, data types = 00 0101(05h), 01 0101 (15h), respectively. 4 bytes (di+data0+data1+ecc) 39h dcs long write/ write _ lut command is used to send larger blocks of data to a display module that implements the display command set. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: (1) for write part, if dcs short write command, followed by bta, the peripheral shall respon d with ack when without error was detected in the transmission (hos t slave). unless an error was detected, the peripher al shall respond with acknowledge with error report . for example: 05h dcs write for no parameter command set. for example: 15h dcs write for only one parameter command set. (2) when use dcs read command, the set max return packet size command will limit the size of returning packets. (3) the peripheral shall respond to dcs read command request in one of the following ways: if an error was detected by the peripheral, it sha ll send acknowledge with error report . so the peripheral shall transmit the requested read data packet with su itable ecc in the same transmission. if no error was detected by the peripheral, it sha ll send the requested read packet (short or long) with appropriate ecc and checksum, if either or both feat ures are enabled. (4) one byte <= length of payload data <= 2 16 -1 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.34- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 maximum return packet size setting data type, hex function description number of bytes 37h set maximum return packet size that specifies the maximum size of the payload in a long packet transmitted fr om peripheral back to the host processor. 4 bytes (di + maximum return packet size + ecc) note: the two-byte value is transmitted with ls byte first . and during a power-on or reset sequence, the maxim um return packet size shall be set by the peripheral to a defau lt value of one. variable data packet data type, hex function description number of bytes 09h null packet is a mechanism for keeping the serial data lane(s) in high-speed mode while sending dummy data. 19h blanking packet is used to convey blanking timing i nformation in a long packet. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: (1) when null packet , the payload data belong null data, actual data v alues sent are irrelevant because the peripheral does not capture or store the data. (2) when blanking packet , the packet represents a period between active sca n lines of a video mode display, data stream format data type, hex function description number of bytes 0eh packed pixel stream 16-bit format is used to transm it image data formatted as 16-bit pixels to a video mode dis play module. pixel format is (5 bits) red, (6 bits) gre en and (5 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last . word count ecc data type virtual channel 5b 6b 5b 5b 6b 5b checksum 1 byte 2 bytes 1 byte 1 byte 1 byte 1 byte 1 byte 2 bytes ph (packet header) variable payload data pf (packet footer) pixel 1 pixel n 5b 6b 5b pixel 1 r0 r4 g0 g5 b0 b4 d0 d7d0 d7 1 byte 1 byte ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.35- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 data stream format data type, hex function description number of bytes 1eh packed pixel stream 18-bit format is used to transm it image data formatted as 18-bit pixels to a video mode dis play module. pixel format is (6 bits) red, (6 bits) gre en and (6 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first and t he msb last and pixel boundaries only line up with by te boundaries every four pixels (nine bytes). preferabl y, display modules employing this format have a hor izontal extent (width in pixels) evenly divisible by four, so no p artial bytes remain at the end of the display line data. it is possible to send pixel data that represent a line width that is not a multiple of four pixels, but display logic o n the receiver end shall dispose of the extra bits of the partial byte at the end of active display and ensure a clean s tart for the next line. word count ecc data type virtual channel 6b 6b 6b 6b 6b 6b 1 byte 2 bytes 1 byte 1 byte 1 byte ph (packet header) variable payload data (first 4 pixels packed at 9 byt es) pixel 1 pixel 4 6b 6b 6b pixel 1 r0 r5 g0 g5 b0 b5 d0 d7 d0 d7 1 byte 1 byte 6b 6b 6b pixel 2 6b 6b 6b pixel 3 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte checksum 2 bytes pf (packet footer) 6b 6b 6b 6b 6b 6b 1 byte 1 byte variable payload data (first 4 pixels packed at 9 byt es) pixel n-3 6b 6b 6b 6b 6b 6b 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte pixel n-2 pixel n-1 pixel n ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.36- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 data stream format data type, hex function description number of bytes 2eh packed pixel stream 18-bit format, each r, g, or b color component is one byte form, but the valid pixel bit s occupy bits [7:2] and bits [1:0] of are ignored. pixel format i s (6 bits) red, (6 bits) green and (6 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last and with this format, pixel boundaries line up with byte boundaries every three bytes. word count ecc data type virtual channel 6b 6b 6b 1 byte 2 bytes 1 byte ph (packet header) variable payload data pf (packet footer) pixel 1 checksum 2 bytes 6b 6b 6b pixel n 1 byte 1 byte 1 byte pixel 1 r0 r5 g0 g5 b0 b5 d0 6b 6b 6b 1 byte 1 byte 1 byte d7 d0 d7 d0 d7 1 byte 1 byte 1 byte ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.37- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 packed pixel stream, 24-bit format data type, hex function description number of bytes 3eh packed pixel stream 24-bit format is used to transm it image data formatted as 24-bit pixels to a video mode dis play module. pixel format is (8 bits) red, (8 bits) gree n and (8 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last and with this format, pixel boundaries line up with byte boundaries every three bytes. word count ecc data type virtual channel 8b 8b 8b 1 byte 2 bytes 1 byte ph (packet header) variable payload data pf (packet footer) pixel 1 checksum 2 bytes 8b 8b 8b pixel n 1 byte 1 byte 1 byte pixel 1 r0 r7g0 g7 b0 b7 d0 8b 8b 8b 1 byte 1 byte 1 byte d7d0 d7d0 d7 1 byte 1 byte 1 byte ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.38- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2.4 peripheral to processor (reverse direction) p acket data type all command mode systems require bidirectional capa bility for returning read data, ack or error information to the host processor. com mand mode that use dcs shall have a bidirectional data path. short packets and t he header of long packets shall use ecc and may use checksum to provide a higher level of data integrit y. the checksum feature enables detection of errors in the payload of long packets. the packet structure for peripheral-to-processor transactions is the same as for the processor-to-peripheral direction. peripheral-to-processor transactions are of four ba sic types: a. tearing effect is a trigger message sent to convey display timing information to the host processor. trigger messages are single byte packets sent by a peripherals phy layer in response to a signal form the dsi protocol layer. b. acknowledge is a trigger message sent when the current transmi ssion, as well as all preceding transmissions since the last peripher al to host communication is received by the peripheral with no errors . c. acknowledge and error report is a short packet sent if any errors were detected in preceding transmission from the host processor. once reported, accumulated errors in the error register are cleared. d. response to read request may be short or long packet that returns data requested by the preceding read command from the pr ocessor. in general, if the host processor completes a trans mission to the peripheral with bta asserted, the peripheral shall respond with one or more appropriate packet(s), and then return bus ownership to the host processor. if bta is not asserted following a transmission from the host processor, the periphera l shall not communicate an acknowledge or other error information back to the host processor. the processor-to-peripheral transactions with bta a sserted, can contain under form. a. following a non-read command in which no error was detected, the peripheral shall respond with acknowledge. b. following a read request in which no error was detected, the peripheral sha ll send the requested read data. c. following a read request in which the ecc error was detected and corrected, the peripheral shall send the requested read data i n a long or short packet, followed by a 4-byte (acknowledge with error report ) packet in the same lp transmission. the error report shall have the ecc e rror flag set. d. following a non-read command in which the ecc error was detected and corrected, the peripheral shall proceed to execute the command, and shall respond to bta by sending a 4-byte (acknowledge wit h error report ) packet, the error report shall have the ecc error flag set. e. following any command in which sot error, sot sync error, eot sync error, lp transmit sync error, checksum error or dsi vc id invalid was detected, or the dsi command was not recognized, the peripher al shall send a 4-byte acknowledge with error report response, with the ap propriate error flags set in the two-byte error field. only the ack/error report packet shall be transmitted; no read or write accesses shall take place on the peri pheral in response. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.39- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 which, a. acknowledge is sent using a trigger message which is one byte: 00100001 b. acknowledge with error report include 4 bytes which are di, 2 bytes error report and ecc. c. response to read request are long packet forma t. an error report is comprised of two bytes following the di byte, with an ecc byte following the error report bytes. table 4.4 shows t he error report bit definitions. and table 4.5 list complete set of peripheral-to-proces sor data types. bit description 0 sot error 1 sot sync error 2 reserved 3 escape mode entry command error 4 low-power transmit sync error 5 peripheral timeout error 6 reserved 7 reserved 8 ecc error, single-bit (detected and corrected) 9 ecc error, multi-bit (detected, not corrected) 10 checksum error (long packet only) 11 dsi data type not recognized 12 dsi vc id invalid 13 reserved 14 reserved 15 reserved table 4.4: shows the error report bit definitions. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.40- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 data type, hex data type, binary description packet size 02h 00 0010 acknowledge with error report short 1ch 01 1100 dcs long read response long others (00h 3fh) reserved - table 4.5: the complete set of peripheral-to-proces sor data types. acknowledge types data type, hex function description number of bytes 02 get acknowledge with error report when error occurs from processor transmission. 4 bytes note: when processor transmits complete payload, following signal by bta, peripheral must respond to processor. with error acknowledge with error report(short packet), without error request read data or acknowledge(trigger message). dcs read types data type, hex function description number of bytes 1ch this is the long-packet response to dcs long read request. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: (1)if the peripheral is checksum capable, is shall return a calculated two-byte checksum appended to t he n-byte payload data. if the peripheral does not sup port checksum, it shall return 0000h. if the dcs command itself is possibly corrupt, due t o an uncorrectable ecc error, sot or sot sync error, the requested read data packet shall not be sent afte r the acknowledge with error report packet be sent. (2)there is no dummy read byte in the read re sponse packet. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.41- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 4.2.5 data format for command mode HX8392-A also support display data write into gram by dsi command mode. the figure 4.8 is show of display data format. 16-bit/pixel 18-bit/pixel 24-bit/pixel figure 4.8: data format of dsi command mode ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.42- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5. function description 5.1 display data gram HX8392-A support the display data ram that stores d isplay dots. there is no restriction on access to the ram even when the disp lay data on the same address is loaded to dac there will be no abnormal visible eff ect on the display when there is a simultaneous panel read and interface read or write to the same location of the frame memory. 5.2 address counter (ac) the HX8392-A contains an address counter (ac) which assigns address for writing/reading pixel data to/from gram. the addres s pointers set the position of gram whose addresses range: res_sel2 res_sel 1 res_sel 0 mv x range y range panel resolution 0 0~799d. 0~1279d. 0 0 0 1 0~1279d. 0~799d. 800rgbx1280 dot 0 0~767d.. 0~1279d. 0 0 1 1 0~1279d. 0~767d. 768rgbx1280 dot 0 0~719d. 0~1279d. 0 1 0 1 0~1279d. 0~719d. 720rgbx1280 dot 0 0~599d. 0~1023d. 0 1 1 1 0~1023d. 0~599d. 600rgbx024 dot table 5.1: addresses counter range every time when a pixel data is written into the gr am, the x address or y address of ac will be automatically increased by 1 (or decreas ed by 1), which is decided by the register (mv, mx and my bit) setting. to simplify the address control of gram access, the window address function allows for writing data only to a window area of gram spec ified by registers. after data is written to the gram, the ac will be increased or de creased within setting window address-range which is specified by the column addr ess register (start: sc, end: ec) or the row address register (start: sp, end: ep). t herefore, the data can be written consecutively without thinking a data wrap by those bit function. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.43- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.3 source, gate and memory map 5.3.1 800rgb x 1280 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 8 9 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 0 399 400 799 799 400 399 0 s1 s400 s401 s800 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r399 7-0 g399 7-0 b399 7-0 r400 7-0 g400 7-0 b400 7-0 r799 7-0 g799 7-0 b799 7-0 note: ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb= red, green and blue pixel position change : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.2: memory map of 800rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.44- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.3.2 768rgb x 1280 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 8 9 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 0 383 384 767 767 384 383 0 s1 s384 s417 s800 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r383 7-0 g383 7-0 b383 7-0 r384 7-0 g384 7-0 b384 7-0 r767 7-0 g767 7-0 b767 7-0 note: ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb= red, green and blue pixel position change : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.3: memory map of 768rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.45- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.3.3 720rgb x 1280 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 8 9 1279 1278 1277 1276 1275 1274 1273 1272 : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 1279 1278 1277 1276 1275 1274 1273 1272 1271 1270 0 359 360 719 719 360 359 0 s1 s360 s441 s800 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r359 7-0 g359 7-0 b359 7-0 r360 7-0 g360 7-0 b360 7-0 r719 7-0 g719 7-0 b719 7-0 note: ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb= red, green and blue pixel position change : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.4: memory map of 720rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.46- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.3.4 600rgb x 1024 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 1023 1022 1021 1020 1019 1018 1017 1016 : : : : 0 1 2 3 4 5 6 7 8 9 1023 1022 1021 1020 1019 1018 1017 1016 : : : : 0 1 2 3 4 5 6 7 1023 1022 1021 1020 1019 1018 1017 1016 1015 1014 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 1023 1022 1021 1020 1019 1018 1017 1016 1015 1014 0 299 300 599 599 300 299 0 s1 s300 s501 s800 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r299 7-0 g299 7-0 b299 7-0 r300 7-0 g300 7-0 b300 7-0 r599 7-0 g599 7-0 b599 7-0 note: ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb= red, green and blue pixel position change : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- : : : : --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.5: memory map of 600rgb x 1024 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.47- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.4 mcu to memory write / read direction b e data stream from mcu is like this figure figure 5.1: mcu to memory write / read direction the data is written in the order as illustrated abo ve. the counter that dictates which physical memory the data is to be written is contro lled by memory access control command, bits my, mx, mv as described below. my mx mv physical row pointer figure 5.2: my, mx, mv setting of 800rgb x 1280 dot mv mx my caset paset 0 0 0 direct to physical column pointer direct to p hysical row pointer 0 0 1 direct to physical column pointer direct to (1279-physical row pointer) with sc 0 1 0 direct to (799-physical column pointer) direct to physical row pointer 0 1 1 direct to (799-physical column pointer) direct to (1279physical row pointer) 1 0 0 direct to physical row pointer direct to phys ical column pointer 1 0 1 direct to (1279-physical row pointer) direct to physical column pointer 1 1 0 direct to physical row pointer direct to (799 -physical column pointer) 1 1 1 direct to (1279-physical row pointer) direct to (799-physical column pointer) figure 5.3: my, mx, mv setting of 800rgb x 1280 dot ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.48- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 the following figure depicts the update method set by mv, mx and my bit. memory access control display data direction mv mx my image in the host image in the driver (gram) normal 0 0 0 b e y-mirror 0 0 1 b e x,y address (0,0) x: caset y: raset b e h/w position (0,0) x-mirror 0 1 0 b e x-mirror y-mirror 0 1 1 b e x-y exchange 1 0 0 b e x,y address (0,0) x: caset y: raset b e h/w position (0,0) x-y exchange y-mirror 1 0 1 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e x-y exchange x-mirror 1 1 0 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e x-y exchange x-mirror y-mirror 1 1 1 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e figure 5.4: address direction settings h/w position (0,0) x,y address (0,0) x: caset y: raset b e ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.49- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.5 fully display, partial display, vertical scroll ing display 5.5.1 fully display example: (1) 800rgbx1280 dot display mode. (2) noron (normal display mode on) instruction (r13 h). (3) sc=0x000h, ec=0x31fh (r2ah) and sp=0x000h, ep=0 x4ffh (r2bh), ml=0. 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 800 columns 800 x 1280 lcd panel 00h 01h 4fdh 0v 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 00v w0 31dh 800 x 1280 frame memory 1280lines 00h 01h 4feh 4ffh 800 columns w1 0w 1w wx wy wz xw yw zw w0 w1 0w 1w wx wy wz xw yw zw 1280 lines 31fh 31eh 31dh 31fh 31eh 00h 01h 4fdh 00h 01h 4feh 4ffh figure 5.5: 800rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.50- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 example: (1) 768rgbx1280 dot display mode. (2) noron (normal display mode on) instruction (r13 h). (3) sc=0x000h, ec=0x2ffh (r2ah) and sp=0x000h, ep=0 x4ffh (r2bh), ml=0. 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 768 columns 768 x 1280 lcd panel 00h 01h 4fdh 0v 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 00v w0 2fdh 768 x 1280 frame memory 1280lines 00h 01h 4feh 4ffh 768 columns w1 0w 1w wx wy wz xw yw zw w0 w1 0w 1w wx wy wz xw yw zw 1280 lines 2ffh 2feh 2fdh 2ffh 2feh 00h 01h 4fdh 00h 01h 4feh 4ffh figure 5.6: 768rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.51- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 example: (1) 72rgbx1280 dot display mode. (2) noron (normal display mode on) instruction (r13 h). (3) sc=0x000h, ec=0x2cfh (r2ah) and sp=0x000h, ep=0 x4ffh (r2bh), ml=0. 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 720 columns 720 x 1280 lcd panel 00h 01h 4fdh 0v 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 00v w0 2cdh 720 x 1280 frame memory 1280lines 00h 01h 4feh 4ffh 720 columns w1 0w 1w wx wy wz xw yw zw w0 w1 0w 1w wx wy wz xw yw zw 1280 lines 2cfh 2ceh 2cdh 2cfh 2ceh 00h 01h 4fdh 00h 01h 4feh 4ffh figure 5.7: 720rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.52- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 example: (1) 600rgbx1024 dot display mode. (2) noron (normal display mode on) instruction (r13 h). (3) sc=0x000h, ec=0x257h (r2ah) and sp=0x000h, ep=0 x3ffh (r2bh), ml=0. 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 600 columns 600 x 1024 lcd panel 00h 01h 3fdh 0v 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 00v w0 255h 600 x 1024 frame memory 1024lines 00h 01h 3feh 3ffh 600 columns w1 0w 1w wx wy wz xw yw zw w0 w1 0w 1w wx wy wz xw yw zw 1024 lines 257h 256h 255h 257h 256h 00h 01h 4fdh 00h 01h 4feh 4ffh figure 5.8: 600rgb x 1024 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.53- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.5.2 vertical scrolling display the vertical scrolling display is specified by vscr def instruction (r33h) and vscrsadd instruction (r37h). figure 5.9: vertical scrolling when vertical scrolling definition parameters (tfa+ vsa+bfa)=panel total scan lines. in this case, scrolling is applied as shown below. 5.5.2.1 example: 800rgb x 1280 when vertical scrolling definition parameters (tfa+ vsa+bfa)=1280. in this case, scrolling is applied as shown below. example (1) tfa=2, vsa=1278, bfa=0 when madctl b4=0 figure 5.10: memory map of vertical scrolling 1 for 800rgb x 1280 resolution scrolling tfa vsa bfa original ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.54- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 example (2) tfa=2, vsa=1276, bfa=2 when madctl b4=0 figure 5.11: memory map of vertical scrolling 2 for 800rgb x 1280 resolution ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.55- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.5.2.2 vertical scroll example there are 2 types of vertical scrolling, which are determined by the commands vertical scrolling definition (33h) and vertical scrolling start address (37h). case 1: tfa + vsa + bfa 1280 do not set tfa + vsa + bfa 1280. in that case, unexpected picture will be show n. case 2: tfa + vsa + bfa=1280 (scrolling) example (1) when tfa=0, vsa=1280, bfa=0 and vscrsad d=40.madctl parameter b4=0 v s c r s a d d p h y s ic a l l in e p o in t e r 2 1 2 1 d is p la y in cr e m e n t v s c r s a d d v s c r s a d d p h y s ic a l l in e p o in t e r 2 1 2 1 d is p la y d isp la y a xis ( 0 ,0 ) m e m o r y p h ysica l a x is (0 ,0 ) d isp la y a xis ( 0 , 0 ) f ra m e f ra m e m e m o ry m e m o ry figure 5.12: vertical scroll example 1 example (2) tfa=30, vsa=1250, bfa=0 and vscrsadd =8 0. madctrl parameter b4=1 vscrsadd physical line pointer 2 1 display display axis (0,0) increment tfa 3 2 1 3 tfa memory physical axis (0,0) vscrsadd physical line pointer 2 1 display display axis (0,0) tfa 3 2 1 3 tfa memory physical axis (0,0) frame memory frame memory vscrsadd figure 5.13: vertical scroll example 2 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.56- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.5.3 tearing effect output line the tearing effect output line supplies to the mpu a panel synchronization signal. this signal can be enabled or disabled by the teari ng effect line off & on commands. the mode of the tearing effect signal is defined by the parameter of the tearing effect line on command. the signal can be used by t he mpu to synchronize frame memory writing when displaying video images. tearing effect line modes mode 1 , the tearing effect output signal consists of v-bl anking information only: figure 5.14: tearing effect output signal mode 1 tvdh= the lcd display is not updated from the frame memory tvdl= the lcd display is updated from the frame mem ory (except invisible line C see below) under mode1, the te output timing will be defined b y tep[10:0] setting. ex: 1. fb=bp=0x01h (3 line) . tep[10:0]=0, then te signal will output after last line finished. tep[10:0]=7, then te signal will output at second l ine start. figure 5.15: te delay output ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.57- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 mode 2 , the tearing effect output signal consists of v-bl anking and h-blanking information, there is one v-sync and n h-sync pulse s per field. n: if res_sel [2:0] set to = 3b000, the resolution is 800 rgb x 1280, the n=1280. figure 5.16: tearing effect output signal mode 2 thdh= the lcd display is not updated from the frame memory thdl= the lcd display is updated from the frame mem ory (except invisible line C see above) under mode2, the h-sync pulses output amount will b e defined by tesl[15:0] setting. ex: 1. tesl[15:0]=0, then te signal will like te mo de 1. tesl[15:0]=1, then te signal will output 1280 h-syn c. figure 5.17: te output for teline setting figure 5.18: tearing effect output signal note: during sleep in mode, the tearing output pin is active low ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.58- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.5.3.1 tearing effect line timing the tearing effect signal is described below: t hdl t hdh t vdh t vdl vertical timing horizontal timing figure 5.19: tearing effect output line Ctearing ef fect line timing idle mode off (resolution 800x1280 rgb, frame rate = 60hz) symbol parameter min. max. unit tvdl vertical timing low duration - - ms tvdh vertical timing high duration - bp+fp us thdl horizontal timing low duration - - us thdh horizontal timing high duration - - us tr rise time - 15 ns tf fall time - 15 ns note: the timings in table 5.13 apply when madctl ml=0 a nd ml=1 table 5.6: ac characteristics of tearing effect sig nal the signals rise and fall times (tf, tr) are stipu lated to be equal to or less than 15ns. tr tf 0.8*vdd1 0.8*vdd1 0.2*vdd1 0.2*vdd1 figure 5.20: tearing effect output lineCdefinition of tf, tr ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.59- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 the tearing effect output line is fed back to the m pu and should be used as shown below to avoid tearing effect. example 1: mpu write is faster than panel read. figure 5.21: tearing effect output lineCexample 1 ( timing) data write to frame memory is now synchronized to t he panel scan. it should be written during the vertical sync pulse of the teari ng effect output line. this ensures that data is always written ahead of the panel scan and each panel frame refresh has a complete new image: data to be sent image on lcd a b c d figure 5.22: tearing effect output lineCexample 1 ( image) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.60- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 example 2: mpu write is slower than panel read. time time time mcu to memory te output signal memory to lcd image on lcd a b c d 1st 864th 1st 864th e f figure 5.23: tearing effect output lineCexample 2 ( timing) the mpu to frame memory write begins just after pan el read has commenced i.e. after one horizontal sync pulse of the tearing effe ct output line. this allows time for the image to download behind the panel read pointer and finishing download during the subsequent frame before the read pointer catch es the mpu to frame memory write position. data to be sent image on lcd e f a b c d figure 5.24: tearing effect output lineCexample 2 ( image) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.61- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.6 oscillator the HX8392-A can oscillate an internal r-c oscillat or with an internal oscillation resistor (rf). the oscillation frequency is changed according to the uadj[3:0] internal register. please refer to osc control register (rb0 h). the default frequency is 48mhz. the oscillation frequency tolerance is 5%. internal display mode internal display mode internal display mode internal display mode fosc foscfosc fosc rgb display mode rgb display mode rgb display mode rgb display mode oscillator oscillator oscillator oscillator clock clock clock clock pclk pclk pclk pclk pwm pwmpwm pwm_ __ _clk clkclk clk ( (( (for backlight cabc for backlight cabc for backlight cabc for backlight cabc) )) ) 48 4848 48mhz mhzmhz mhz frequency frequency frequency frequency divider divider divider divider 2 22 2 fs fsfs fs1 11 1[ [[ [1 11 1: :: :0 00 0] ]] ] step up circuit step up circuit step up circuit step up circuit ( ( ( ( for vgh for vgh for vgh for vgh, ,, ,vgl vglvgl vgl) )) ) display display display display controller controller controller controller uadj uadj uadj uadj[ [[ [3 33 3: :: :0 00 0] ]] ] pclk pclk pclk pclk rgb display mode rgb display mode rgb display mode rgb display mode osc frequency osc frequency osc frequency osc frequency / / / / 4 44 4 figure 5.25: osc aritecture ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.62- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.7 source driver the HX8392-A contains a 800 channels of source driv er which is used for driving the source line of tft lcd panel. the source driver con verts the digital data from gram into the analog voltage for 800 channels and genera tes corresponding gray scale voltage output, which can realize a 16.7m colors di splay simultaneously. since the output circuit of this source driver incorporates a n operational amplifier, a positive and a negative voltage can be alternately outputted fro m each channel. res_sel[2:0] resolution source channels 000 800rgbx1280 dot s1 ~ s800 001 768rgbx1280 dot s1 ~ s384, s417~s800 010 720rgbx1280 dot s1 ~ s360, s441~s800 011 600rgbx1024 dot s1 ~ s300, s501~s800 table 5.7: source output for panel resolution + - + - + - - + - + - + + - + - + - - + - + - + + - + - + - - + - + - + + - + - + - - + - + - + g1 g1280 g2 g3 g4 g5 g6 g7 sw1 sw2 sw3 sw1 sw2 sw3 s1 s800 1 C dot inversion - + - + - + + - + - + - + - + - + - - + - + - + - + - + - + + - + - + - + - + - + - - + - + - + g1 g1280 g2 g3 g4 g5 g6 g7 sw1 sw2 sw3 sw1 sw2 sw3 s1 s800 2 C dot inversion - + - + - + - + - + - + + - + - + - + - + - + - + - + - + - + - + - + - - + - + - + - + - + - + g1 g1280 g2 g3 g4 g5 g6 g7 sw1 sw2 sw3 sw1 sw2 sw3 s1 s800 4 C dot inversion + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - g1 g1280 g2 g3 g4 g5 g6 g7 sw1 sw2 sw3 sw1 sw2 sw3 s1 s800 column inversion figure 5.26: inversion mode ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.63- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.8 lcd power generation scheme figure 5.27: lcd power generation scheme voltage configuration HX8392-A has an internal power supply circuit to dr ive ltps lcd panel. please set up each voltage output according to the lcd panel. name function set up value note vref reference voltage from internal band gap circu it 1.8v - vsp dc/dc converter circuit output 4.7v ~ 5.5v do n ot exceed 6 v vsn dc/dc converter circuit output -4.7v ~ -5.5v do not exceed 6v vspc dc/dc converter circuit output 4.7v ~ 5.5v do not exceed 6 v vsnc dc/dc converter circuit output -4.7v ~ -5.5v d o not exceed 6v vspr reference voltage for gamma circuit 3.5v ~ (vs p C 0.5v) reference register vsnr reference voltage for gamma circuit -3.5v ~ (v sn + 0.5v) reference register vdddn logic power supply -2.5v - vgh positive gate driver output voltage level +9v ~ +12v depend on vsp and vsn vgl negative gate driver output voltage level -5v ~ -8v depend on vsp and vsn vcl dc/dc converter circuit output -vdd3 depend on vdd3 vcom vcom dc voltage -2v ~ 0v - hs_ldo analog power for hifh speeg interface circui t 1.5v depend on dsi i/f table 5.8: voltage configuration ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.64- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.9 dc/dc converter circuit 5.9.1 use charge pump step up circuit use c11p/n,c12p/n,c13p/n,c14p/n c15p/n,c16p/n,c17p/ n,c18p/n for vsp generation, and use c23p/n,c24p/n,c31p/n,c32p/n for vsn generat ion. the output voltage can be set from 4.7 to 5.5v (vsp) and -4.7 to -5.5v (vsn). figure 5.28: dc/dc converter circuit of internal ch arge pump ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.65- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.9.2 use hx5186-a the hx5186-a is highly efficient switching voltage generator circuits that generate the high voltage level vsp/vsn required for source driv ers. HX8392-A contains charge pump controller for hx5186-a, including a comparato r for vsp/vsn feedback control. hx5186-a can provide maximum efficiency and use min imum number of external components. the output voltage of the boost convert er can be set from 4.7 to 5.5 (vsp) and -4.7 to -5.5v (vsn) figure 5.29: dc/dc converter circuit of hx5186-a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.66- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.10 idle display the HX8392-A supports an idle display mode. the gra yscale level to be used is v0 and v64 with r7, g7, b7 decoding, and the other lev els (v1-v63) are halted to reduce power consumption. in idle display mode, the gamma- micro-adjustment registers are invalid and only the upper bits of rgb are used for display. 8- bit grayscale d/ a converter output driver output driver output driver r g b lcd graphics (input data) positive polarity register 1 b 3 b 2 b 1 b 0 g 5 g 3 g 2 g 1 g 0 g 4 b 5 b 4 r 5 r 3 r 2 r 1 r 0 r 4 < r > 8- bit grayscale d/ a converter < g > 8- bit grayscale d/ a converter < b > grayscale voltage generator 1 1 negative polarity register rr 6 7 gg 6 7 bb 67 v0p/v0n v1p/v1n v255p/v255n g1_vrp0[5:0] g1_vrp1[5:0] g1_vrp2[5:0] g1_vrp3[5:0] g1_vrp4[5:0] g1_vrp5[5:0] g1_prp0[6:0] g1_prp1[6:0] g1_pkp5[4:0] g1_pkp6[4:0] g1_pkp7[4:0] g1_pkp8[4:0] g1_vrn0[5:0] g1_vrn1[5:0] g1_vrn2[5:0] g1_vrn3[5:0] g1_vrn4[5:0] g1_vrn5[5:0] g1_prn0[6:0] g1_prn1[6:0] g1_pkn5[4:0] g1_pkn6[4:0] g1_pkn7[4:0] g1_pkn8[4:0] figure 5.30: idle mode grayscale control ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.67- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.11 gamma characteristic correction function the HX8392-A incorporates gamma adjustment function for the 16,777,216-color display (256 grayscale for each r, g, b color). gam ma adjustment operation is implemented by deciding the16 grayscale levels firs tly in gamma adjustment control registers to match the lcd panel. then total 512 gr ayscale levels are generated in grayscale voltage generator. these registers are av ailable for both polarities. 8- bit grayscale d/ a converter output driver output driver output driver r g b lcd graphics (input data) positive polarity register 8 b 3 b 2 b 1 b 0 g 5 g 3 g 2 g 1 g 0 g 4 b 5 b 4 r 5 r 3 r 2 r 1 r 0 r 4 < r > 8- bit grayscale d/ a converter < g > 8- bit grayscale d/ a converter < b > grayscale voltage generator 8 8 negative polarity register rr 6 7 gg 6 7 bb 67 v0p/v0n v1p/v1n v255p/v255n g1_vrp0[5:0] g1_vrp1[5:0] g1_vrp2[5:0] g1_vrp3[5:0] g1_vrp4[5:0] g1_vrp5[5:0] g1_prp0[6:0] g1_prp1[6:0] g1_pkp5[4:0] g1_pkp6[4:0] g1_pkp7[4:0] g1_pkp8[4:0] g1_vrn0[5:0] g1_vrn1[5:0] g1_vrn2[5:0] g1_vrn3[5:0] g1_vrn4[5:0] g1_vrn5[5:0] g1_prn0[6:0] g1_prn1[6:0] g1_pkn5[4:0] g1_pkn6[4:0] g1_pkn7[4:0] g1_pkn8[4:0] figure 5.31: grayscale control ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.68- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.11.1 gamma-characteristics adjustment register this HX8392-A has register groups for specifying a series grayscale voltage that meets the gamma-characteristics for the lcd panel used. t hese registers are divided into two groups, which correspond to the gradient, amplitude , and macro adjustment of the voltage for the grayscale characteristics. the pola rity of each register can be specified independently. (1) offset adjustment registers the offset adjustment variable registers are used t o adjust the amplitude of the grayscale voltage. this function is implemented by controlling these variable resisters in the top and bottom of the gamma resister stream for reference gamma voltage generation. these registers are available for both positive and negative polarities. (2) gamma center adjustment registers the gamma center adjustment registers are used to a djust the reference gamma voltage in the middle level of grayscale without ch anging the dynamic range. this function is implemented by choosing one input of 88 to 1 selector in the gamma resister stream for reference gamma voltage generation. thes e registers are available for both positive and negative polarities. (3) gamma macro adjustment registers the gamma macro adjustment registers can be used fo r fine adjustment of the reference gamma voltage. this function is implement ed by controlling the 32-to-1 selectors (pkp/n0~5), each of which has 5 inputs an d generates one reference voltage output (vg(p/n)3, 7, 19, 25, 32, 38, 44, 56, 60). register groups positive polarity negative polarity description prp0 6-0 prn0 6-0 variable resistor (prp/n0) for center adjustment center adjustment prp1 6-0 prn1 6-0 variable resistor (prp/n1)for center adjustment pkp0 4-0 pkn0 4-0 32-to-1 selector (voltage level of grayscale 3) pkp1 4-0 pkn1 4-0 32-to-1 selector (voltage level of grayscale 7) pkp2 4-0 pkn2 4-0 32-to-1 selector (voltage level of grayscale 19) pkp3 4-0 pkn3 4-0 32-to-1 selector (voltage level of grayscale 25) pkp4 4-0 pkn4 4-0 32-to-1 selector (voltage level of grayscale 32 for positive polarity and grayscale 31 for negative polarity) pkp5 4-0 pkn5 4-0 32-to-1 selector (voltage level of grayscale 38) pkp6 4-0 pkn6 4-0 32-to-1 selector (voltage level of grayscale 44) pkp7 4-0 pkn7 4-0 32-to-1 selector (voltage level of grayscale 56) macro adjustment pkp8 4-0 pkn8 4-0 32-to-1 selector (voltage level of grayscale 60) vrp0 5-0 vrn0 5-0 variable resistor (vrp/n0)for offset adjustment vrp1 5-0 vrn1 5-0 variable resistor (vrp/n1)for offset adjustment vrp2 5-0 vrn2 5-0 variable resistor (vrp/n2)for offset adjustment vrp3 5-0 vrn3 5-0 variable resistor (vrp/n3)for offset adjustment vrp4 5-0 vrn4 5-0 variable resistor (vrp/n4)for offset adjustment offset adjustment vrp5 5-0 vrn5 5-0 variable resistor (vrp/n5)for offset adjustment table 5.9: gamma-adjustment registers ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.69- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 gamma resister stream and 8 to 1 selector note: 1. vv0~vv63 > 1/2vsp of positive output 2. vv193~vv255 > 1/2 vsn of negative output figure 5.32: gamma resister stream and gamma refere nce voltage ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.70- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 variable resister there are two types of variable resistors, one is f or center adjustment and the other is for offset adjustment. the resistances are decided by s etting values in the center adjustment, offset adjustment registers. their relationships ar e shown below. value in register vr(p/n)0 5-0 resistance vr(p/n)0 value in register vr(p/n)1 5-0 resistance vr(p/n)1 value in register vr(p/n)2 5-0 resistance vr(p/n)2 000000 0r 000000 0r 000000 0r 000001 20r 000001 2r 000001 2r 000010 22r 000010 4r 000010 4r 000011 24r 000011 6r 000011 6r 011101 76r 011101 58r 011101 58r 011110 78r 011110 60r 011110 60r 011111 80r 011111 62r 011111 62r 100000 82r 100000 64r 100000 64r 100001 84r 100001 66r 100001 66r 100010 86r 100010 68r 100010 68r 111101 140r 111101 122r 111101 122r 111110 142r 111110 124r 111110 124r 111111 144r 111111 126r 111111 126r value in register vr(p/n)3 5-0 resistance vr(p/n)3 value in register vr(p/n)4 5-0 resistance vr(p/n)4 value in register vr(p/n)5 5-0 resistance vr(p/n)2 000000 0r 000000 0r 000000 0r 000001 2r 000001 2r 000001 2r 000010 4r 000010 4r 000010 4r 011101 58r 011101 58r 011101 58r 011110 60r 011110 60r 011110 60r 011111 62r 011111 62r 011111 62r 100000 64r 100000 64r 100000 64r 100001 66r 100001 66r 100001 66r 100010 68r 100010 68r 100010 68r 111100 120r 111100 120r 111100 120r 111101 122r 111101 122r 111101 122r 111110 124r 111110 124r 111110 124r 111111 126r 111111 126r 111111 144r table 5.10: offset adjustment 0~5 value in register pr(p/n)0 6-0 resistance pr(p/n)0 value in register pr(p/n)1 6-0 resistance pr(p/n)1 0000000 0r 0000000 0r 0000001 2r 0000001 2r 0000010 4r 0000010 4r 1010101 170r 1010101 170r 1010110 172r 1010110 172r 1010111 174r 1010111 174r table 5.11: center adjustment ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.71- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 the grayscale levels are determined by the followin g formulas: reference voltage macro adjustment value vinp0 formula vrp0 5-0 = 000000 vspr vrp0 5-0 = 000001 ((450r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000010 ((450r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000011 ((450r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000100 ((450r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000101 ((450r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000110 ((450r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000111 ((450r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001000 ((450r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001001 ((450r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001010 ((450r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001011 ((450r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001100 ((450r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001101 ((450r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001110 ((450r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001111 ((450r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010000 ((450r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010001 ((450r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010010 ((450r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010011 ((450r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010100 ((450r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010101 ((450r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010110 ((450r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010111 ((450r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011000 ((450r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011001 ((450r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011010 ((450r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011011 ((450r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011100 ((450r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011101 ((450r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011110 ((450r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011111 ((450r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100000 ((450r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100001 ((450r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100010 ((450r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100011 ((450r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100100 ((450r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100101 ((450r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100110 ((450r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100111 ((450r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101000 ((450r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101001 ((450r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101010 ((450r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101011 ((450r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101100 ((450r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101101 ((450r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101110 ((450r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101111 ((450r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110000 ((450r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110001 ((450r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110010 ((450r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110011 ((450r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110100 ((450r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110101 ((450r - 124r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110110 ((450r - 126r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110111 ((450r - 128r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111000 ((450r - 130r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111001 ((450r - 132r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111010 ((450r - 134r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111011 ((450r - 136r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111100 ((450r - 138r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111101 ((450r - 140r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111110 ((450r - 142r) / 450r) * (vspr - vgsp) + vgsp vinp0 vrp0 5-0 = 111111 ((450r - 144r) / 450r) * (vspr - vgsp) + vgsp table 5.12: vinp0 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.72- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp1 formula vrp1 5 - 0 = 000000 (430r / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000001 ((430r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000010 ((430r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000011 ((430r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000100 ((430r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000101 ((430r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000110 ((430r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000111 ((430r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001000 ((430r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001001 ((430r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001010 ((430r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001011 ((430r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001100 ((430r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001101 ((430r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001110 ((430r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001111 ((430r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010000 ((430r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010001 ((430r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010010 ((430r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010011 ((430r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010100 ((430r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010101 ((430r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010110 ((430r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010111 ( (430r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011000 ((430r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011001 ((430r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011010 ((430r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011011 ((430r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011100 ((430r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011101 ((430r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011110 ((430r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp 1 5 - 0 = 011111 ((430r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100000 ((430r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100001 ((430r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100010 ((430r - 68r ) / 450r) * (vspr - vgsp) + vg sp vrp1 5 - 0 = 100011 ((430r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100100 ((430r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100101 ((430r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100110 ((430r - 76r ) / 450r) * (vspr - vg sp) + vgsp vrp1 5 - 0 = 100111 ((430r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101000 ((430r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101001 ((430r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101010 ((430r - 84r ) / 450r) * (v spr - vgsp) + vgsp vrp1 5 - 0 = 101011 ((430r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101100 ((430r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101101 ((430r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101110 ((430r - 92r ) / 45 0r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101111 ((430r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110000 ((430r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110001 ((430r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110010 ((430r - 10 0r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110011 ((430r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110100 ((430r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110101 ((430r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110110 ((4 30r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110111 ((430r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111000 ((430r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111001 ((430r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 11 1010 ((430r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111011 ((430r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111100 ((430r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111101 ((430r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111110 ((430r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp1 vrp1 5 - 0 = 111111 ((430r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.13: vinp1 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.73- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp2 formula vrp2 5 - 0 = 000000 (420r / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000001 ((420r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000010 ((420r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000011 ((420r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000100 ((420r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000101 ((420r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000110 ((420r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000111 ((420r - 14r ) / 450r) * (vspr - vgsp) + vgs p vrp2 5 - 0 = 001000 ((420r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001001 ((420r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001010 ((420r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001011 ((420r - 22r ) / 450r) * (vspr - vgs p) + vgsp vrp2 5 - 0 = 001100 ((420r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001101 ((420r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001110 ((420r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001111 ((420r - 30r ) / 450r) * (vs pr - vgsp) + vgsp vrp2 5 - 0 = 010000 ((420r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010001 ((420r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010010 ((420r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010011 ((420r - 38r ) / 450 r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010100 ((420r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010101 ((420r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010110 ((420r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010111 ((420r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011000 ((420r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011001 ((420r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011010 ((420r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011011 ((42 0r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011100 ((420r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011101 ((420r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011110 ((420r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011 111 ((420r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100000 ((420r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100001 ((420r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100010 ((420r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100011 ((420r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100100 ((420r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100101 ((420r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100110 ((420r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100111 ((420r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101000 ((420r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101001 ((420r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101010 ((420r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101011 ((420r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101100 ((420r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101101 ((420r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101110 ((420r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101111 ((420r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110000 ((420r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110001 ((420r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110010 ((420r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110011 ((420r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110100 ((420r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110101 ((420r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110110 ((420r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110111 ((420r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111000 ((420r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111001 ((420r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111010 ((420r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111011 ((420r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111100 ((420r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111101 ((420r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 11111 0 ((420r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp2 vrp2 5 - 0 = 111111 ((420r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.14: vinp2 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.74- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp14 formula vrp3 5 - 0 = 000000 (156r / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000001 ((156r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000010 ((156r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000011 ((156r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000100 ((156r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000101 ((156r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000110 ((156r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000111 ((156r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp 3 5 - 0 = 001000 ((156r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001001 ((156r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001010 ((156r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001011 ((156r - 22r ) / 450r) * (vspr - vgsp) + vg sp vrp3 5 - 0 = 001100 ((156r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001101 ((156r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001110 ((156r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001111 ((156r - 30r ) / 450r) * (vspr - vg sp) + vgsp vrp3 5 - 0 = 010000 ((156r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010001 ((156r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010010 ((156r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010011 ((156r - 38r ) / 450r) * (v spr - vgsp) + vgsp vrp3 5 - 0 = 010100 ((156r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010101 ((156r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010110 ((156r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010111 ((156r - 46r ) / 45 0r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011000 ((156r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011001 ((156r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011010 ((156r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011011 ((156r - 54 r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011100 ((156r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011101 ((156r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011110 ((156r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011111 ((1 56r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100000 ((156r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100001 ((156r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100010 ((156r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 10 0011 ((156r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100100 ((156r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100101 ((156r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100110 ((156r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100111 ((156r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101000 ((156r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101001 ((156r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101010 ((156r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101011 ((156r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101100 ((156r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101101 ((156r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101110 ((156r - 92r ) / 450r) * (vspr - vgsp ) + vgsp vrp3 5 - 0 = 101111 ((156r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110000 ((156r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110001 ((156r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110010 ((156r - 100r) / 450r) * (vsp r - vgsp) + vgsp vrp3 5 - 0 = 110011 ((156r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110100 ((156r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110101 ((156r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110110 ((156r - 108r) / 450r ) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110111 ((156r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111000 ((156r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111001 ((156r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111010 ((156r - 116r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111011 ((156r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111100 ((156r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111101 ((156r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111110 ((156 r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp14 vrp3 5 - 0 = 111111 ((156r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.15: vinp14 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.75- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp15 formula vrp4 5 - 0 = 0000 00 (146r / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000001 ((146r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000010 ((146r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000011 ((146r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 00010 0 ((146r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000101 ((146r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000110 ((146r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000111 ((146r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001000 ((146r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001001 ((146r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001010 ((146r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001011 ((146r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001100 ((146r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001101 ((146r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001110 ((146r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001111 ((146r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010000 ((146r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010001 ((146r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010010 ((146r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010011 ((146r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010100 ((146r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010101 ((146r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010110 ((146r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010111 ((146r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011000 ((146r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011001 ((146r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011010 ((146r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011011 ((146r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011100 ((146r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011101 ((146r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011110 ((146r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011111 ((146r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100000 ((146r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100001 ((146r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100010 ((146r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100011 ((146r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100100 ((146r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100101 ((146r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100110 ((146r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100111 ((146r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101000 ((146r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101001 ((146r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101010 ((146r - 84r ) / 450r) * (vspr - vgsp) + vgsp vr p4 5 - 0 = 101011 ((146r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101100 ((146r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101101 ((146r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101110 ((146r - 92r ) / 450r) * (vspr - vgsp) + v gsp vrp4 5 - 0 = 101111 ((146r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110000 ((146r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110001 ((146r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110010 ((146r - 100r) / 450r) * (vspr - v gsp) + vgsp vrp4 5 - 0 = 110011 ((146r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110100 ((146r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110101 ((146r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110110 ((146r - 108r) / 450r) * ( vspr - vgsp) + vgsp vrp4 5 - 0 = 110111 ((146r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111000 ((146r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111001 ((146r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111010 ((146r - 116r) / 4 50r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111011 ((146r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111100 ((146r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111101 ((146r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111110 ((146r - 1 24r) / 450r) * (vspr - vgsp) + vgsp vinp15 vrp4 5 - 0 = 111111 ((146r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.16: vinp15 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.76- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp16 formula vrp5 5 - 0 = 000000 (1 44r / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000001 ((144r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000010 ((144r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000011 ((144r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000100 ((144r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000101 ((144r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000110 ((144r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000111 ((144r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001000 ((144r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001001 ((144r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001010 ((144r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001011 ((144r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001100 ((144r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001101 ((144r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001110 ((144r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001111 ((144r - 30r ) / 450r) * (vspr - vgsp) + vgsp v rp5 5 - 0 = 010000 ((144r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010001 ((144r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010010 ((144r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010011 ((144r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010100 ((144r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010101 ((144r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010110 ((144r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010111 ((144r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011000 ((144r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011001 ((144r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011010 ((144r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011011 ((144r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011100 ((144r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011101 ((144r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011110 ((144r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011111 ((144r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100000 ((144r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100001 ((144r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100010 ((144r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100011 ((144r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100100 ((144r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100101 ((144r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100110 ((144r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100111 ( (144r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101000 ((144r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101001 ((144r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101010 ((144r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101011 ((144r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101100 ((144r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101101 ((144r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101110 ((144r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp 5 5 - 0 = 101111 ((144r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110000 ((144r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110001 ((144r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110010 ((144r - 100r) / 450r) * (vspr - vgsp) + vg sp vrp5 5 - 0 = 110011 ((144r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110100 ((144r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110101 ((144r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110110 ((144r - 108r) / 450r) * (vspr - vg sp) + vgsp vrp5 5 - 0 = 110111 ((144r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111000 ((144r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111001 ((144r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111010 ((144r - 116r) / 450r) * (v spr - vgsp) + vgsp vrp5 5 - 0 = 111011 ((144r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111100 ((144r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111101 ((144r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111110 ((144r - 124r) / 45 0r) * (vspr - vgsp) + vgsp vinp16 vrp5 5 - 0 = 111111 vgsp table 5.17: vinp16 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.77- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp5 formula prp0 6-0 = 0000000 (350r / 450r) (vspr - vgsp) + vg sp prp0 6-0 = 0000001 ((350r - 2r) / 450r) * (vspr - v gsp) + vgsp prp0 6-0 = 0000010 ((350r - 4r) / 450r) * (vspr - v gsp) + vgsp prp0 6-0 = 0000011 ((350r C 6r) / 450r) * (vspr - v gsp) + vgsp prp0 6-0 = 0000100 ((350r C 8r) / 450r) * (vspr - v gsp) + vgsp prp0 6-0 = 0000101 ((350r C 10r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000110 ((350r C 12r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000111 ((350r - 14r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001000 ((350r C 16r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001001 ((350r C 18r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001010 ((350r C 20r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001011 ((350r C 22r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001100 ((350r C 24r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001101 ((350r C 26r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001110 ((350r C 28r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001111 ((350r C 30r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010000 ((350r C 32r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010001 ((350r - 34r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010010 ((350r C 36r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010011 ((350r C 38r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010100 ((350r C 40r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010101 ((350r C 42r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010110 ((350r C 44r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010111 ((350r C 46r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011000 ((350r C 48r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011001 ((350r C 50r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011010 ((350r C 52r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011011 ((350r - 54r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011100 ((350r C 56r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011101 ((350r C 58r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011110 ((350r C 60r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011111 ((350r C 62r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100000 ((350r - 64r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100001 ((350r C 66r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100010 ((350r C 68r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100011 ((350r C 70r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100100 ((350r C 72r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100101 ((350r C 74r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100110 ((350r C 76r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100111 ((350r C 78r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101000 ((350r C 80r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101001 ((350r C 82r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101010 ((350r - 84r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101011 ((350r C 86r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101100 ((350r C 88r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101101 ((350r C 90r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101110 ((350r C 92r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101111 ((350r C 94r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110000 ((350r C 96r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110001 ((350r C 98r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110010 ((350r C 100r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110011 ((350r C 102r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110100 ((350r C 104r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110101 ((350r C 106r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110110 ((350r C 108r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110111 ((350r C 110r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111000 ((350r C 112r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111001 ((350r C 114r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111010 ((350r C 116r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111011 ((350r C 118r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111100 ((350r C 120r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111101 ((350r C 122r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111110 ((350r - 124r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111111 ((350r C 126r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000000 ((350r C 128r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000001 ((350r C 130r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000010 ((350r - 132r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000011 ((350r C 134r) / 450r) * (vspr - vgsp) + vgsp vinp5 prp0 6-0 = 1000100 ((350r C 136r) / 450r) * (vspr - vgsp) + vgsp ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.78- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 prp0 6-0 = 1000101 ((350r C 138r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000110 ((350r C 140r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000111 ((350r C 142r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001000 ((350r C 144r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001001 ((350r C 146r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001010 ((350r C 148r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001011 ((350r C 150r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001100 ((350r - 152r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001101 ((350r C 154r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001110 ((350r C 156r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001111 ((350r C 158r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010000 ((350r C 160r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010001 ((350r C 162r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010010 ((350r C 164r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010011 ((350r C 166r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010100 ((350r C 168r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010101 ((350r C 170r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010110 ((350r C 172r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010111 ((350r - 174r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1011000 inhibit prp0 6-0 = 1011001 inhibit prp0 6-0 = 1011010 inhibit prp0 6-0 = 1011011 inhibit prp0 6-0 = 1011100 inhibit prp0 6-0 = 1011101 inhibit prp0 6-0 = 1011110 inhibit prp0 6-0 = 1011111 inhibit prp0 6-0 = 1100000 inhibit prp0 6-0 = 1100001 inhibit prp0 6-0 = 1100010 inhibit prp0 6-0 = 1100011 inhibit prp0 6-0 = 1100100 inhibit prp0 6-0 = 1100101 inhibit prp0 6-0 = 1100110 inhibit prp0 6-0 = 1100111 inhibit prp0 6-0 = 1101000 inhibit prp0 6-0 = 1101001 inhibit prp0 6-0 = 1101010 inhibit prp0 6-0 = 1101011 inhibit prp0 6-0 = 1101100 inhibit prp0 6-0 = 1101101 inhibit prp0 6-0 = 1101110 inhibit prp0 6-0 = 1101111 inhibit prp0 6-0 = 1110000 inhibit prp0 6-0 = 1110001 inhibit prp0 6-0 = 1110010 inhibit prp0 6-0 = 1110011 inhibit prp0 6-0 = 1110100 inhibit prp0 6-0 = 1110101 inhibit prp0 6-0 = 1110110 inhibit prp0 6-0 = 1110111 inhibit prp0 6-0 = 1111000 inhibit prp0 6-0 = 1111001 inhibit prp0 6-0 = 1111010 inhibit prp0 6-0 = 1111011 inhibit prp0 6-0 = 1111100 inhibit prp0 6-0 = 1111101 inhibit prp0 6-0 = 1111110 inhibit prp0 6-0 = 1111111 inhibit table 5.18: vinp5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.79- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp11 formula prp1 6-0 = 0000000 (274r / 450r) (vspr - vgsp) + vg sp prp1 6-0 = 0000001 ((274r - 2r) / 450r) * (vspr - v gsp) + vgsp prp1 6-0 = 0000010 ((274r - 4r) / 450r) * (vspr - v gsp) + vgsp prp1 6-0 = 0000011 ((274r C 6r) / 450r) * (vspr - v gsp) + vgsp prp1 6-0 = 0000100 ((274r C 8r) / 450r) * (vspr - v gsp) + vgsp prp1 6-0 = 0000101 ((274r C 10r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000110 ((274r C 12r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000111 ((274r - 14r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001000 ((274r C 16r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001001 ((274r C 18r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001010 ((274r C 20r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001011 ((274r C 22r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001100 ((274r C 24r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001101 ((274r C 26r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001110 ((274r C 28r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001111 ((274r C 30r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010000 ((274r C 32r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010001 ((274r - 34r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010010 ((274r C 36r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010011 ((274r C 38r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010100 ((274r C 40r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010101 ((274r C 42r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010110 ((274r C 44r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010111 ((274r C 46r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011000 ((274r C 48r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011001 ((274r C 50r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011010 ((274r C 52r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011011 ((274r - 54r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011100 ((274r C 56r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011101 ((274r C 58r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011110 ((274r C 60r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011111 ((274r C 62r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100000 ((274r - 64r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100001 ((274r C 66r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100010 ((274r C 68r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100011 ((274r C 70r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100100 ((274r C 72r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100101 ((274r C 74r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100110 ((274r C 76r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100111 ((274r C 78r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101000 ((274r C 80r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101001 ((274r C 82r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101010 ((274r - 84r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101011 ((274r C 86r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101100 ((274r C 88r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101101 ((274r C 90r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101110 ((274r C 92r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101111 ((274r C 94r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110000 ((274r C 96r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110001 ((274r C 98r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110010 ((274r C 100r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110011 ((274r C 102r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110100 ((274r C 104r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110101 ((274r C 106r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110110 ((274r C 108r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110111 ((274r C 110r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111000 ((274r C 112r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111001 ((274r C 114r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111010 ((274r C 116r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111011 ((274r C 118r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111100 ((274r C 120r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111101 ((274r C 122r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111110 ((274r - 124r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111111 ((274r C 126r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000000 ((274r C 128r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000001 ((274r C 130r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000010 ((274r - 132r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000011 ((274r C 134r) / 450r) * (vspr - vgsp) + vgsp vinp11 prp1 6-0 = 1000100 ((274r C 136r) / 450r) * (vspr - vgsp) + vgsp ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.80- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 prp1 6-0 = 1000101 ((274r C 138r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000110 ((274r C 140r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000111 ((274r C 142r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001000 ((274r C 144r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001001 ((274r C 146r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001010 ((274r C 148r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001011 ((274r C 150r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001100 ((274r - 152r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001101 ((274r C 154r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001110 ((274r C 156r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001111 ((274r C 158r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010000 ((274r C 160r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010001 ((274r C 162r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010010 ((274r C 164r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010011 ((274r C 166r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010100 ((274r C 168r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010101 ((274r C 170r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010110 ((274r C 172r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010111 ((274r - 174r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1011000 inhibit prp1 6-0 = 1011001 inhibit prp1 6-0 = 1011010 inhibit prp1 6-0 = 1011011 inhibit prp1 6-0 = 1011100 inhibit prp1 6-0 = 1011101 inhibit prp1 6-0 = 1011110 inhibit prp1 6-0 = 1011111 inhibit prp1 6-0 = 1100000 inhibit prp1 6-0 = 1100001 inhibit prp1 6-0 = 1100010 inhibit prp1 6-0 = 1100011 inhibit prp1 6-0 = 1100100 inhibit prp1 6-0 = 1100101 inhibit prp1 6-0 = 1100110 inhibit prp1 6-0 = 1100111 inhibit prp1 6-0 = 1101000 inhibit prp1 6-0 = 1101001 inhibit prp1 6-0 = 1101010 inhibit prp1 6-0 = 1101011 inhibit prp1 6-0 = 1101100 inhibit prp1 6-0 = 1101101 inhibit prp1 6-0 = 1101110 inhibit prp1 6-0 = 1101111 inhibit prp1 6-0 = 1110000 inhibit prp1 6-0 = 1110001 inhibit prp1 6-0 = 1110010 inhibit prp1 6-0 = 1110011 inhibit prp1 6-0 = 1110100 inhibit prp1 6-0 = 1110101 inhibit prp1 6-0 = 1110110 inhibit prp1 6-0 = 1110111 inhibit prp1 6-0 = 1111000 inhibit prp1 6-0 = 1111001 inhibit prp1 6-0 = 1111010 inhibit prp1 6-0 = 1111011 inhibit prp1 6-0 = 1111100 inhibit prp1 6-0 = 1111101 inhibit prp1 6-0 = 1111110 inhibit prp1 6-0 = 1111111 inhibit table 5.19: vinp11 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.81- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp3 formula pkp0 4-0 = 00000 (47r / 48r) * (vinp2 - vinp5) + vi np5 pkp0 4-0 = 00001 ((47r C 1r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00010 ((47r C 2r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00011 ((47r C 3r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00100 ((47r C 4r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00101 ((47r C 5r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00110 ((47r C 6r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 00111 ((47r C 7r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 01000 ((47r C 8r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 01001 ((47r C 9r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp0 4-0 = 01010 ((47r - 10r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 01011 ((47r - 11r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 01100 ((47r - 12r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 01101 ((47r - 13r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 01110 ((47r - 14r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 01111 ((47r - 15r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10000 ((47r - 16r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10001 ((47r - 17r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10010 ((47r - 18r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10011 ((47r - 19r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10100 ((47r - 20r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10101 ((47r - 21r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10110 ((47r - 22r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 10111 ((47r - 23r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11000 ((47r - 24r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11001 ((47r - 25r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11010 ((47r - 26r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11011 ((47r - 27r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11100 ((47r - 28r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11101 ((47r - 29r) / 48r) * (vinp2 - vin p5) + vinp5 pkp0 4-0 = 11110 ((47r - 30r) / 48r) * (vinp2 - vin p5) + vinp5 vinp3 pkp0 4-0 = 11111 ((47r - 31r) / 48r) * (vinp2 - vin p5) + vinp5 table 5.20: vinp3 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.82- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp4 formula pkp1 4-0 = 00000 (32r / 48r) * (vinp2 - vinp5) + vi np5 pkp1 4-0 = 00001 ((32r - 1r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00010 ((32r - 2r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00011 ((32r - 3r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00100 ((32r - 4r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00101 ((32r - 5r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00110 ((32r - 6r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 00111 ((32r - 7r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 01000 ((32r - 8r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 01001 ((32r - 9r) / 48r) * (vinp2 - vinp 5) + vinp5 pkp1 4-0 = 01010 ((32r - 10r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 01011 ((32r - 11r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 01100 ((32r - 12r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 01101 ((32r - 13r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 01110 ((32r - 14r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 01111 ((32r - 15r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10000 ((32r - 16r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10001 ((32r - 17r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10010 ((32r - 18r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10011 ((32r - 19r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10100 ((32r - 20r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10101 ((32r - 21r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10110 ((32r - 22r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 10111 ((32r - 23r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11000 ((32r - 24r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11001 ((32r - 25r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11010 ((32r - 26r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11011 ((32r - 27r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11100 ((32r - 28r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11101 ((32r - 29r) / 48r) * (vinp2 - vin p5) + vinp5 pkp1 4-0 = 11110 ((32r - 30r) / 48r) * (vinp2 - vin p5) + vinp5 vinp4 pkp1 4-0 = 11111 ((32r - 31r) / 48r) * (vinp2 - vin p5) + vinp5 table 5.21: vinp4 reference voltage macro adjustment value vinp6 formula pkp2 4-0 = 00000 (220r / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00001 ((220r - 3r) / 223r) * (vinp5 - vi np11) + vinp11 pkp2 4-0 = 00010 ((220r - 6r) / 223r) * (vinp5 - vi np11) + vinp11 pkp2 4-0 = 00011 ((220r - 9r) / 223r) * (vinp5 - vi np11) + vinp11 pkp2 4-0 = 00100 ((220r - 12r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 00101 ((220r - 15r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 00110 ((220r - 18r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 00111 ((220r - 21r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01000 ((220r - 24r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01001 ((220r - 27r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01010 ((220r - 30r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01011 ((220r - 33r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01100 ((220r - 36r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01101 ((220r - 39r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01110 ((220r - 42r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 01111 ((220r - 45r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10000 ((220r - 48r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10001 ((220r - 51r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10010 ((220r - 54r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10011 ((220r - 57r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10100 ((220r - 60r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10101 ((220r - 63r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10110 ((220r - 66r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 10111 ((220r - 69r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11000 ((220r - 72r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11001 ((220r - 75r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11010 ((220r - 78r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11011 ((220r - 81r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11100 ((220r - 84r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11101 ((220r - 87r) / 223r) * (vinp5 - v inp11) + vinp11 pkp2 4-0 = 11110 ((220r - 90r) / 223r) * (vinp5 - v inp11) + vinp11 vinp6 pkp2 4-0 = 11111 ((220r - 93r) / 223r) * (vinp5 - v inp11) + vinp11 table 5.22: vinp6 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.83- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp7 formula pkp3 4-0 = 00000 (193r / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00001 ((193r - 3r) / 223r) * (vinp5 - vi np11) + vinp11 pkp3 4-0 = 00010 ((193r - 6r) / 223r) * (vinp5 - vi np11) + vinp11 pkp3 4-0 = 00011 ((193r - 9r) / 223r) * (vinp5 - vi np11) + vinp11 pkp3 4-0 = 00100 ((193r - 12r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 00101 ((193r - 15r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 00110 ((193r - 18r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 00111 ((193r - 21r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01000 ((193r - 24r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01001 ((193r - 27r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01010 ((193r - 30r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01011 ((193r - 33r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01100 ((193r - 36r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01101 ((193r - 39r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01110 ((193r - 42r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 01111 ((193r - 45r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10000 ((193r - 48r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10001 ((193r - 51r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10010 ((193r - 54r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10011 ((193r - 57r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10100 ((193r - 60r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10101 ((193r - 63r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10110 ((193r - 66r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 10111 ((193r - 69r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11000 ((193r - 72r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11001 ((193r - 75r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11010 ((193r - 78r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11011 ((193r - 81r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11100 ((193r - 84r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11101 ((193r - 87r) / 223r) * (vinp5 - v inp11) + vinp11 pkp3 4-0 = 11110 ((193r - 90r) / 223r) * (vinp5 - v inp11) + vinp11 vinp7 pkp3 4-0 = 11111 ((193r - 93r) / 223r) * (vinp5 - v inp11) + vinp11 table 5.23: vinp7 reference voltage macro adjustment value vinp8 formula pkp4 4-0 = 00000 (158r / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00001 ((158r - 3r) / 223r) * (vinp5 - vi np11) + vinp11 pkp4 4-0 = 00010 ((158r - 6r) / 223r) * (vinp5 - vi np11) + vinp11 pkp4 4-0 = 00011 ((158r - 9r) / 223r) * (vinp5 - vi np11) + vinp11 pkp4 4-0 = 00100 ((158r - 12r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 00101 ((158r - 15r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 00110 ((158r - 18r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 00111 ((158r - 21r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01000 ((158r - 24r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01001 ((158r - 27r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01010 ((158r - 30r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01011 ((158r - 33r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01100 ((158r - 36r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01101 ((158r - 39r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01110 ((158r - 42r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 01111 ((158r - 45r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10000 ((158r - 48r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10001 ((158r - 51r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10010 ((158r - 54r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10011 ((158r - 57r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10100 ((158r - 60r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10101 ((158r - 63r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10110 ((158r - 66r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 10111 ((158r - 69r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11000 ((158r - 72r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11001 ((158r - 75r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11010 ((158r - 78r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11011 ((158r - 81r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11100 ((158r - 84r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11101 ((158r - 87r) / 223r) * (vinp5 - v inp11) + vinp11 pkp4 4-0 = 11110 ((158r - 90r) / 223r) * (vinp5 - v inp11) + vinp11 vinp8 pkp4 4-0 = 11111 ((158r - 93r) / 223r) * (vinp5 - v inp11) + vinp11 table 5.24: vinp8 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.84- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp9 formula pkp5 4-0 = 00000 (123r / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00001 ((123r - 3r) / 223r) * (vinp5 - vi np11) + vinp11 pkp5 4-0 = 00010 ((123r - 6r) / 223r) * (vinp5 - vi np11) + vinp11 pkp5 4-0 = 00011 ((123r - 9r) / 223r) * (vinp5 - vi np11) + vinp11 pkp5 4-0 = 00100 ((123r - 12r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 00101 ((123r - 15r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 00110 ((123r - 18r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 00111 ((123r - 21r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01000 ((123r - 24r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01001 ((123r - 27r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01010 ((123r - 30r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01011 ((123r - 33r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01100 ((123r - 36r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01101 ((123r - 39r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01110 ((123r - 42r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 01111 ((123r - 45r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10000 ((123r - 48r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10001 ((123r - 51r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10010 ((123r - 54r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10011 ((123r - 57r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10100 ((123r - 60r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10101 ((123r - 63r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10110 ((123r - 66r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 10111 ((123r - 69r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11000 ((123r - 72r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11001 ((123r - 75r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11010 ((123r - 78r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11011 ((123r - 81r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11100 ((123r - 84r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11101 ((123r - 87r) / 223r) * (vinp5 - v inp11) + vinp11 pkp5 4-0 = 11110 ((123r - 90r) / 223r) * (vinp5 - v inp11) + vinp11 vinp9 pkp5 4-0 = 11111 ((123r - 93r) / 223r) * (vinp5 - v inp11) + vinp11 table 5.25: vinp9 reference voltage macro adjustment value vinp10 formula pkp6 4-0 = 00000 (96r / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00001 ((96r - 3r) / 223r) * (vinp5 - vin p11) + vinp11 pkp6 4-0 = 00010 ((96r - 6r) / 223r) * (vinp5 - vin p11) + vinp11 pkp6 4-0 = 00011 ((96r - 9r) / 223r) * (vinp5 - vin p11) + vinp11 pkp6 4-0 = 00100 ((96r - 12r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 00101 ((96r - 15r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 00110 ((96r - 18r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 00111 ((96r - 21r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01000 ((96r - 24r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01001 ((96r - 27r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01010 ((96r - 30r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01011 ((96r - 33r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01100 ((96r - 36r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01101 ((96r - 39r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01110 ((96r - 42r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 01111 ((96r - 45r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10000 ((96r - 48r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10001 ((96r - 51r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10010 ((96r - 54r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10011 ((96r - 57r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10100 ((96r - 60r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10101 ((96r - 63r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10110 ((96r - 66r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 10111 ((96r - 69r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11000 ((96r - 72r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11001 ((96r - 75r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11010 ((96r - 78r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11011 ((96r - 81r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11100 ((96r - 84r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11101 ((96r - 87r) / 223r) * (vinp5 - vi np11) + vinp11 pkp6 4-0 = 11110 ((96r - 90r) / 223r) * (vinp5 - vi np11) + vinp11 vinp10 pkp6 4-0 = 11111 ((96r - 93r) / 223r) * (vinp5 - vi np11) + vinp11 table 5.26: vinp10 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.85- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinp12 formula pkp7 4-0 = 00000 (47r / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00001 ((47r - 1r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00010 ((47r - 2r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00011 ((47r - 3r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00100 ((47r - 4r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00101 ((47r - 5r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00110 ((47r - 6r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 00111 ((47r - 7r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 01000 ((47r - 8r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 01001 ((47r - 9r) / 48r) * (vinp11 - vin p14) + vinp14 pkp7 4-0 = 01010 ((47r - 10r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 01011 ((47r - 11r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 01100 ((47r - 12r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 01101 ((47r - 13r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 01110 ((47r - 14r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 01111 ((47r - 15r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10000 ((47r - 16r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10001 ((47r - 17r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10010 ((47r - 18r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10011 ((47r - 19r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10100 ((47r - 20r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10101 ((47r - 21r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10110 ((47r - 22r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 10111 ((47r - 23r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11000 ((47r - 24r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11001 ((47r - 25r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11010 ((47r - 26r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11011 ((47r - 27r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11100 ((47r - 28r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11101 ((47r - 29r) / 48r) * (vinp11 - vi np14) + vinp14 pkp7 4-0 = 11110 ((47r - 30r) / 48r) * (vinp11 - vi np14) + vinp14 vinp12 pkp7 4-0 = 11111 ((47r - 31r) / 48r) * (vinp11 - vi np14) + vinp14 table 5.27: vinp12 reference voltage macro adjustment value vinp13 formula pkp8 4-0 = 00000 (32r / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00001 ((32r - 1r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00010 ((32r - 2r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00011 ((32r - 3r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00100 ((32r - 4r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00101 ((32r - 5r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00110 ((32r - 6r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 00111 ((32r - 7r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 01000 ((32r - 8r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 01001 ((32r - 9r) / 48r) * (vinp11 - vin p14) + vinp14 pkp8 4-0 = 01010 ((32r - 10r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 01011 ((32r - 11r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 01100 ((32r - 12r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 01101 ((32r - 13r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 01110 ((32r - 14r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 01111 ((32r - 15r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10000 ((32r - 16r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10001 ((32r - 17r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10010 ((32r - 18r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10011 ((32r - 19r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10100 ((32r - 20r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10101 ((32r - 21r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10110 ((32r - 22r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 10111 ((32r - 23r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11000 ((32r - 24r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11001 ((32r - 25r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11010 ((32r - 26r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11011 ((32r - 27r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11100 ((32r - 28r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11101 ((32r - 29r) / 48r) * (vinp11 - vi np14) + vinp14 pkp8 4-0 = 11110 ((32r - 30r) / 48r) * (vinp11 - vi np14) + vinp14 vinp13 pkp8 4-0 = 11111 ((32r - 31r) / 48r) * (vinp11 - vi np14) + vinp14 table 5.28: vinp13 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.86- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn0 formula vrn0 5-0 = 000000 vsnr vrn0 5-0 = 000001 ((450r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000010 ((450r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000011 ((450r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000100 ((450r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000101 ((450r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000110 ((450r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000111 ((450r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001000 ((450r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001001 ((450r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001010 ((450r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001011 ((450r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001100 ((450r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001101 ((450r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001110 ((450r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001111 ((450r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010000 ((450r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010001 ((450r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010010 ((450r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010011 ((450r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010100 ((450r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010101 ((450r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010110 ((450r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010111 ((450r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011000 ((450r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011001 ((450r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011010 ((450r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011011 ((450r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011100 ((450r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011101 ((450r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011110 ((450r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011111 ((450r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100000 ((450r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100001 ((450r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100010 ((450r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100011 ((450r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100100 ((450r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100101 ((450r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100110 ((450r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100111 ((450r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101000 ((450r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101001 ((450r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101010 ((450r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101011 ((450r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101100 ((450r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101101 ((450r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101110 ((450r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101111 ((450r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110000 ((450r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110001 ((450r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110010 ((450r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110011 ((450r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110100 ((450r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110101 ((450r - 124r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110110 ((450r - 126r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110111 ((450r - 128r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111000 ((450r - 130r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111001 ((450r - 132r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111010 ((450r - 134r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111011 ((450r - 136r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111100 ((450r - 138r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111101 ((450r - 140r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111110 ((450r - 142r) / 450r) * (vsnr - vgsn) + vgsn vinn0 vrn0 5-0 = 111111 ((450r - 144r) / 450r) * (vsnr - vgsn) + vgsn table 5.29: vinn0 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.87- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn1 formula vrn1 5 - 0 = 000000 (430r / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000001 ((430r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000010 ((430r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000011 ((430r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000100 ((430r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000101 ((430r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vr n1 5 - 0 = 000110 ((430r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000111 ((430r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001000 ((430r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001001 ((430r - 18r ) / 450r) * (vsnr - vgsn) + v gsn vrn1 5 - 0 = 001010 ((430r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001011 ((430r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001100 ((430r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001101 ((430r - 26r ) / 450r) * (vsnr - v gsn) + vgsn vrn1 5 - 0 = 001110 ((430r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001111 ((430r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010000 ((430r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010001 ((430r - 34r ) / 450r) * ( vsnr - vgsn) + vgsn vrn1 5 - 0 = 010010 ((430r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010011 ((430r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010100 ((430r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010101 ((430r - 42r ) / 4 50r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010110 ((430r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010111 ((430r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011000 ((430r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011001 ((430r - 5 0r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011010 ((430r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011011 ((430r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011100 ((430r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011101 (( 430r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011110 ((430r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011111 ((430r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100000 ((430r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 1 00001 ((430r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100010 ((430r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100011 ((430r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100100 ((430r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100101 ((430r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100110 ((430r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100111 ((430r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101000 ((430r - 80r ) / 450r) * (vsnr - vgsn) + vgs n vrn1 5 - 0 = 101001 ((430r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101010 ((430r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101011 ((430r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101100 ((430r - 88r ) / 450r) * (vsnr - vgs n) + vgsn vrn1 5 - 0 = 101101 ((430r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101110 ((430r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101111 ((430r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110000 ((430r - 96r ) / 450r) * (vs nr - vgsn) + vgsn vrn1 5 - 0 = 110001 ((430r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110010 ((430r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110011 ((430r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110100 ((430r - 104r) / 450 r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110101 ((430r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110110 ((430r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110111 ((430r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111000 ((430r - 112 r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111001 ((430r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111010 ((430r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111011 ((430r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111100 ((43 0r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111101 ((430r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111110 ((430r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn1 vrn1 5 - 0 = 111111 ((430r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.30: vinn1 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.88- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn2 formula vrn2 5 - 0 = 000000 (420r / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000001 ((420r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000010 ( (420r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000011 ((420r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000100 ((420r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000101 ((420r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 00 0110 ((420r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000111 ((420r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001000 ((420r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001001 ((420r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001010 ((420r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001011 ((420r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001100 ((420r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001101 ((420r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001110 ((420r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001111 ((420r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010000 ((420r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010001 ((420r - 34r ) / 450r) * (vsnr - vgsn ) + vgsn vrn2 5 - 0 = 010010 ((420r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010011 ((420r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010100 ((420r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010101 ((420r - 42r ) / 450r) * (vsn r - vgsn) + vgsn vrn2 5 - 0 = 010110 ((420r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010111 ((420r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011000 ((420r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011001 ((420r - 50r ) / 450r ) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011010 ((420r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011011 ((420r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011100 ((420r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011101 ((420r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011110 ((420r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011111 ((420r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100000 ((420r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100001 ((420 r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100010 ((420r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100011 ((420r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100100 ((420r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 1001 01 ((420r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100110 ((420r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100111 ((420r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101000 ((420r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101001 ((420r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101010 ((420r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101011 ((420r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101100 ((420r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101101 ((420r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101110 ((420r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101111 ((420r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110000 ((420r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110001 ((420r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110010 ((420r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110011 ((420r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110100 ((420r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110101 ((420r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110110 ((420r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110111 ((420r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111000 ((420r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111001 ((420r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111010 ((420r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111011 ((420r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111100 ((420r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111101 ((420r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111110 ((420r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn2 vrn2 5 - 0 = 111111 ((420r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.31: vinn2 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.89- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn14 formula vrn3 5 - 0 = 000000 (156r / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000001 ((156r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000010 ((156r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000011 ((156r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000100 ((156r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000101 ((156r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000110 ( (156r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000111 ((156r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001000 ((156r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001001 ((156r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001010 ((156r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001011 ((156r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001100 ((156r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001101 ((156r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn 3 5 - 0 = 001110 ((156r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001111 ((156r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010000 ((156r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010001 ((156r - 34r ) / 450r) * (vsnr - vgsn) + vg sn vrn3 5 - 0 = 010010 ((156r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010011 ((156r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010100 ((156r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010101 ((156r - 42r ) / 450r) * (vsnr - vg sn) + vgsn vrn3 5 - 0 = 010110 ((156r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010111 ((156r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011000 ((156r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011001 ((156r - 50r ) / 450r) * (v snr - vgsn) + vgsn vrn3 5 - 0 = 011010 ((156r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011011 ((156r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011100 ((156r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011101 ((156r - 58r ) / 45 0r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011110 ((156r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011111 ((156r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100000 ((156r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100001 ((156r - 66 r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100010 ((156r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100011 ((156r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100100 ((156r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100101 ((1 56r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100110 ((156r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100111 ((156r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101000 ((156r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 10 1001 ((156r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101010 ((156r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101011 ((156r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101100 ((156r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101101 ((156r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101110 ((156r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101111 ((156r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110000 ((156r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110001 ((156r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110010 ((156r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110011 ((156r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110100 ((156r - 104r) / 450r) * (vsnr - vgsn ) + vgsn vrn3 5 - 0 = 110101 ((156r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110110 ((156r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110111 ((156r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111000 ((156r - 112r) / 450r) * (vsn r - vgsn) + vgsn vrn3 5 - 0 = 111001 ((156r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111010 ((156r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111011 ((156r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111100 ((156r - 120r) / 450r ) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111101 ((156r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111110 ((156r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn14 vrn3 5 - 0 = 111111 ((156r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.32: vinn14 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.90- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn15 formula vrn4 5 - 0 = 000000 (146r / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000001 ((146r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000010 ((146r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000011 ((146r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000100 ((146r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000101 ((146r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000110 ((146 r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000111 ((146r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001000 ((146r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001001 ((146r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 0010 10 ((146r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001011 ((146r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001100 ((146r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001101 ((146r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001110 ((146r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001111 ((146r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010000 ((146r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010001 ((146r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010010 ((146r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010011 ((146r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010100 ((146r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010101 ((146r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010110 ((146r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010111 ((146r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011000 ((146r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011001 ((146r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011010 ((146r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011011 ((146r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011100 ((146r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011101 ((146r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011110 ((146r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011111 ((146r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100000 ((146r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100001 ((146r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100010 ((146r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100011 ((146r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100100 ((146r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100101 ((146r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100110 ((146r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100111 ((146r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101000 ((146r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101001 ((146r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101010 ((146r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101011 ((146r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101100 ((146r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101101 ((146r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101110 ((146r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101111 ((146r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110000 ((146r - 96r ) / 450r) * (vsnr - vgsn) + vgsn v rn4 5 - 0 = 110001 ((146r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110010 ((146r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110011 ((146r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110100 ((146r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110101 ((146r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110110 ((146r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110111 ((146r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111000 ((146r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111001 ((146r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111010 ((146r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111011 ((146r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111100 ((146r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111101 ((146r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111110 ((146r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn15 vrn4 5 - 0 = 111111 ((146r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.33: vinn15 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.91- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn16 formula vrn5 5 - 0 = 000000 (144r / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000001 ((144r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000010 ((144r - 4r ) / 45 0r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000011 ((144r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000100 ((144r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000101 ((144r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000110 ((144r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000111 ((144r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001000 ((144r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001001 ((144r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001010 ((144 r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001011 ((144r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001100 ((144r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001101 ((144r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 0011 10 ((144r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001111 ((144r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010000 ((144r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010001 ((144r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010010 ((144r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010011 ((144r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010100 ((144r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010101 ((144r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010110 ((144r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010111 ((144r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011000 ((144r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011001 ((144r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011010 ((144r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011011 ((144r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011100 ((144r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011101 ((144r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011110 ((144r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011111 ((144r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100000 ((144r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100001 ((144r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100010 ((144r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100011 ((144r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100100 ((144r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100101 ((144r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100110 ((144r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100111 ((144r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101000 ((144r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101001 ((144r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101010 ((144r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101011 ((144r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101100 ((144r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101101 ((144r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101110 ((144r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101111 ((144r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110000 ((144r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110001 ((144r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110010 ((144r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110011 ((144r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110100 ((144r - 104r) / 450r) * (vsnr - vgsn) + vgsn v rn5 5 - 0 = 110101 ((144r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110110 ((144r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110111 ((144r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111000 ((144r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111001 ((144r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111010 ((144r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111011 ((144r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111100 ((144r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111101 ((144r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111110 ((144r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn16 vrn5 5 - 0 = 111111 vgsn table 5.34: vinn16 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.92- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn5 formula prn0 6-0 = 0000000 (350r / 450r) (vsnr - vgsn) + vg sn prn0 6-0 = 0000001 ((350r - 2r) / 450r) * (vsnr - v gsn) + vgsn prn0 6-0 = 0000010 ((350r - 4r) / 450r) * (vsnr - v gsn) + vgsn prn0 6-0 = 0000011 ((350r C 6r) / 450r) * (vsnr - v gsn) + vgsn prn0 6-0 = 0000100 ((350r C 8r) / 450r) * (vsnr - v gsn) + vgsn prn0 6-0 = 0000101 ((350r C 10r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000110 ((350r C 12r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000111 ((350r - 14r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001000 ((350r C 16r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001001 ((350r C 18r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001010 ((350r C 20r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001011 ((350r C 22r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001100 ((350r C 24r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001101 ((350r C 26r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001110 ((350r C 28r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001111 ((350r C 30r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010000 ((350r C 32r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010001 ((350r - 34r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010010 ((350r C 36r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010011 ((350r C 38r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010100 ((350r C 40r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010101 ((350r C 42r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010110 ((350r C 44r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010111 ((350r C 46r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011000 ((350r C 48r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011001 ((350r C 50r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011010 ((350r C 52r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011011 ((350r - 54r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011100 ((350r C 56r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011101 ((350r C 58r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011110 ((350r C 60r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011111 ((350r C 62r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100000 ((350r - 64r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100001 ((350r C 66r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100010 ((350r C 68r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100011 ((350r C 70r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100100 ((350r C 72r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100101 ((350r C 74r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100110 ((350r C 76r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100111 ((350r C 78r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101000 ((350r C 80r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101001 ((350r C 82r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101010 ((350r - 84r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101011 ((350r C 86r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101100 ((350r C 88r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101101 ((350r C 90r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101110 ((350r C 92r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101111 ((350r C 94r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110000 ((350r C 96r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110001 ((350r C 98r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110010 ((350r C 100r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110011 ((350r C 102r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110100 ((350r C 104r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110101 ((350r C 106r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110110 ((350r C 108r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110111 ((350r C 110r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111000 ((350r C 112r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111001 ((350r C 114r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111010 ((350r C 116r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111011 ((350r C 118r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111100 ((350r C 120r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111101 ((350r C 122r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111110 ((350r - 124r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111111 ((350r C 126r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000000 ((350r C 128r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000001 ((350r C 130r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000010 ((350r - 132r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000011 ((350r C 134r) / 450r) * (vsnr - vgsn) + vgsn vinn5 prn0 6-0 = 1000100 ((350r C 136r) / 450r) * (vsnr - vgsn) + vgsn ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.93- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 prn0 6-0 = 1000101 ((350r C 138r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000110 ((350r C 140r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000111 ((350r C 142r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001000 ((350r C 144r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001001 ((350r C 146r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001010 ((350r C 148r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001011 ((350r C 150r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001100 ((350r - 152r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001101 ((350r C 154r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001110 ((350r C 156r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001111 ((350r C 158r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010000 ((350r C 160r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010001 ((350r C 162r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010010 ((350r C 164r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010011 ((350r C 166r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010100 ((350r C 168r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010101 ((350r C 170r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010110 ((350r C 172r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010111 ((350r - 174r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1011000 inhibit prn0 6-0 = 1011001 inhibit prn0 6-0 = 1011010 inhibit prn0 6-0 = 1011011 inhibit prn0 6-0 = 1011100 inhibit prn0 6-0 = 1011101 inhibit prn0 6-0 = 1011110 inhibit prn0 6-0 = 1011111 inhibit prn0 6-0 = 1100000 inhibit prn0 6-0 = 1100001 inhibit prn0 6-0 = 1100010 inhibit prn0 6-0 = 1100011 inhibit prn0 6-0 = 1100100 inhibit prn0 6-0 = 1100101 inhibit prn0 6-0 = 1100110 inhibit prn0 6-0 = 1100111 inhibit prn0 6-0 = 1101000 inhibit prn0 6-0 = 1101001 inhibit prn0 6-0 = 1101010 inhibit prn0 6-0 = 1101011 inhibit prn0 6-0 = 1101100 inhibit prn0 6-0 = 1101101 inhibit prn0 6-0 = 1101110 inhibit prn0 6-0 = 1101111 inhibit prn0 6-0 = 1110000 inhibit prn0 6-0 = 1110001 inhibit prn0 6-0 = 1110010 inhibit prn0 6-0 = 1110011 inhibit prn0 6-0 = 1110100 inhibit prn0 6-0 = 1110101 inhibit prn0 6-0 = 1110110 inhibit prn0 6-0 = 1110111 inhibit prn0 6-0 = 1111000 inhibit prn0 6-0 = 1111001 inhibit prn0 6-0 = 1111010 inhibit prn0 6-0 = 1111011 inhibit prn0 6-0 = 1111100 inhibit prn0 6-0 = 1111101 inhibit prn0 6-0 = 1111110 inhibit prn0 6-0 = 1111111 inhibit table 5.35: vinn5 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.94- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn11 formula prn1 6-0 = 0000000 (274r / 450r) (vsnr - vgsn) + vg sn prn1 6-0 = 0000001 ((274r - 2r) / 450r) * (vsnr - v gsn) + vgsn prn1 6-0 = 0000010 ((274r - 4r) / 450r) * (vsnr - v gsn) + vgsn prn1 6-0 = 0000011 ((274r C 6r) / 450r) * (vsnr - v gsn) + vgsn prn1 6-0 = 0000100 ((274r C 8r) / 450r) * (vsnr - v gsn) + vgsn prn1 6-0 = 0000101 ((274r C 10r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000110 ((274r C 12r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000111 ((274r - 14r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001000 ((274r C 16r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001001 ((274r C 18r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001010 ((274r C 20r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001011 ((274r C 22r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001100 ((274r C 24r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001101 ((274r C 26r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001110 ((274r C 28r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001111 ((274r C 30r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010000 ((274r C 32r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010001 ((274r - 34r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010010 ((274r C 36r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010011 ((274r C 38r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010100 ((274r C 40r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010101 ((274r C 42r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010110 ((274r C 44r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010111 ((274r C 46r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011000 ((274r C 48r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011001 ((274r C 50r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011010 ((274r C 52r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011011 ((274r - 54r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011100 ((274r C 56r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011101 ((274r C 58r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011110 ((274r C 60r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011111 ((274r C 62r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100000 ((274r - 64r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100001 ((274r C 66r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100010 ((274r C 68r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100011 ((274r C 70r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100100 ((274r C 72r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100101 ((274r C 74r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100110 ((274r C 76r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100111 ((274r C 78r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101000 ((274r C 80r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101001 ((274r C 82r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101010 ((274r - 84r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101011 ((274r C 86r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101100 ((274r C 88r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101101 ((274r C 90r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101110 ((274r C 92r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101111 ((274r C 94r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110000 ((274r C 96r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110001 ((274r C 98r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110010 ((274r C 100r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110011 ((274r C 102r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110100 ((274r C 104r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110101 ((274r C 106r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110110 ((274r C 108r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110111 ((274r C 110r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111000 ((274r C 112r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111001 ((274r C 114r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111010 ((274r C 116r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111011 ((274r C 118r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111100 ((274r C 120r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111101 ((274r C 122r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111110 ((274r - 124r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111111 ((274r C 126r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000000 ((274r C 128r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000001 ((274r C 130r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000010 ((274r - 132r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000011 ((274r C 134r) / 450r) * (vsnr - vgsn) + vgsn vinn11 prn1 6-0 = 1000100 ((274r C 136r) / 450r) * (vsnr - vgsn) + vgsn ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.95- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 prn1 6-0 = 1000101 ((274r C 138r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000110 ((274r C 140r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000111 ((274r C 142r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001000 ((274r C 144r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001001 ((274r C 146r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001010 ((274r C 148r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001011 ((274r C 150r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001100 ((274r - 152r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001101 ((274r C 154r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001110 ((274r C 156r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001111 ((274r C 158r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010000 ((274r C 160r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010001 ((274r C 162r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010010 ((274r C 164r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010011 ((274r C 166r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010100 ((274r C 168r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010101 ((274r C 170r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010110 ((274r C 172r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010111 ((274r - 174r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1011000 inhibit prn1 6-0 = 1011001 inhibit prn1 6-0 = 1011010 inhibit prn1 6-0 = 1011011 inhibit prn1 6-0 = 1011100 inhibit prn1 6-0 = 1011101 inhibit prn1 6-0 = 1011110 inhibit prn1 6-0 = 1011111 inhibit prn1 6-0 = 1100000 inhibit prn1 6-0 = 1100001 inhibit prn1 6-0 = 1100010 inhibit prn1 6-0 = 1100011 inhibit prn1 6-0 = 1100100 inhibit prn1 6-0 = 1100101 inhibit prn1 6-0 = 1100110 inhibit prn1 6-0 = 1100111 inhibit prn1 6-0 = 1101000 inhibit prn1 6-0 = 1101001 inhibit prn1 6-0 = 1101010 inhibit prn1 6-0 = 1101011 inhibit prn1 6-0 = 1101100 inhibit prn1 6-0 = 1101101 inhibit prn1 6-0 = 1101110 inhibit prn1 6-0 = 1101111 inhibit prn1 6-0 = 1110000 inhibit prn1 6-0 = 1110001 inhibit prn1 6-0 = 1110010 inhibit prn1 6-0 = 1110011 inhibit prn1 6-0 = 1110100 inhibit prn1 6-0 = 1110101 inhibit prn1 6-0 = 1110110 inhibit prn1 6-0 = 1110111 inhibit prn1 6-0 = 1111000 inhibit prn1 6-0 = 1111001 inhibit prn1 6-0 = 1111010 inhibit prn1 6-0 = 1111011 inhibit prn1 6-0 = 1111100 inhibit prn1 6-0 = 1111101 inhibit prn1 6-0 = 1111110 inhibit prn1 6-0 = 1111111 inhibit table 5.36: vinn11 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.96- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn3 formula pkn0 4-0 = 00000 (47r / 48r) * (vinn2 - vinn5) + vi nn5 pkn0 4-0 = 00001 ((47r C 1r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00010 ((47r C 2r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00011 ((47r C 3r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00100 ((47r C 4r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00101 ((47r C 5r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00110 ((47r C 6r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 00111 ((47r C 7r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 01000 ((47r C 8r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 01001 ((47r C 9r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn0 4-0 = 01010 ((47r - 10r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 01011 ((47r - 11r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 01100 ((47r - 12r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 01101 ((47r - 13r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 01110 ((47r - 14r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 01111 ((47r - 15r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10000 ((47r - 16r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10001 ((47r - 17r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10010 ((47r - 18r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10011 ((47r - 19r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10100 ((47r - 20r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10101 ((47r - 21r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10110 ((47r - 22r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 10111 ((47r - 23r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11000 ((47r - 24r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11001 ((47r - 25r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11010 ((47r - 26r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11011 ((47r - 27r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11100 ((47r - 28r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11101 ((47r - 29r) / 48r) * (vinn2 - vin n5) + vinn5 pkn0 4-0 = 11110 ((47r - 30r) / 48r) * (vinn2 - vin n5) + vinn5 vinn3 pkn0 4-0 = 11111 ((47r - 31r) / 48r) * (vinn2 - vin n5) + vinn5 table 5.37: vinn3 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.97- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn4 formula pkn1 4-0 = 00000 (32r / 48r) * (vinn2 - vinn5) + vi nn5 pkn1 4-0 = 00001 ((32r - 1r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00010 ((32r - 2r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00011 ((32r - 3r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00100 ((32r - 4r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00101 ((32r - 5r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00110 ((32r - 6r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 00111 ((32r - 7r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 01000 ((32r - 8r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 01001 ((32r - 9r) / 48r) * (vinn2 - vinn 5) + vinn5 pkn1 4-0 = 01010 ((32r - 10r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 01011 ((32r - 11r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 01100 ((32r - 12r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 01101 ((32r - 13r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 01110 ((32r - 14r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 01111 ((32r - 15r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10000 ((32r - 16r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10001 ((32r - 17r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10010 ((32r - 18r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10011 ((32r - 19r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10100 ((32r - 20r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10101 ((32r - 21r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10110 ((32r - 22r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 10111 ((32r - 23r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11000 ((32r - 24r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11001 ((32r - 25r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11010 ((32r - 26r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11011 ((32r - 27r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11100 ((32r - 28r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11101 ((32r - 29r) / 48r) * (vinn2 - vin n5) + vinn5 pkn1 4-0 = 11110 ((32r - 30r) / 48r) * (vinn2 - vin n5) + vinn5 vinn4 pkn1 4-0 = 11111 ((32r - 31r) / 48r) * (vinn2 - vin n5) + vinn5 table 5.38: vinn4 reference voltage macro adjustment value vinn6 formula pkn2 4-0 = 00000 (220r / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00001 ((220r - 3r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn2 4-0 = 00010 ((220r - 6r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn2 4-0 = 00011 ((220r - 9r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn2 4-0 = 00100 ((220r - 12r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 00101 ((220r - 15r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 00110 ((220r - 18r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 00111 ((220r - 21r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01000 ((220r - 24r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01001 ((220r - 27r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01010 ((220r - 30r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01011 ((220r - 33r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01100 ((220r - 36r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01101 ((220r - 39r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01110 ((220r - 42r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 01111 ((220r - 45r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10000 ((220r - 48r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10001 ((220r - 51r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10010 ((220r - 54r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10011 ((220r - 57r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10100 ((220r - 60r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10101 ((220r - 63r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10110 ((220r - 66r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 10111 ((220r - 69r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11000 ((220r - 72r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11001 ((220r - 75r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11010 ((220r - 78r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11011 ((220r - 81r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11100 ((220r - 84r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11101 ((220r - 87r) / 223r) * (vinn5 - v inn11) + vinn11 pkn2 4-0 = 11110 ((220r - 90r) / 223r) * (vinn5 - v inn11) + vinn11 vinn6 pkn2 4-0 = 11111 ((220r - 93r) / 223r) * (vinn5 - v inn11) + vinn11 table 5.39: vinn6 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.98- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn7 formula pkn3 4-0 = 00000 (193r / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00001 ((193r - 3r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn3 4-0 = 00010 ((193r - 6r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn3 4-0 = 00011 ((193r - 9r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn3 4-0 = 00100 ((193r - 12r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 00101 ((193r - 15r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 00110 ((193r - 18r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 00111 ((193r - 21r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01000 ((193r - 24r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01001 ((193r - 27r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01010 ((193r - 30r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01011 ((193r - 33r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01100 ((193r - 36r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01101 ((193r - 39r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01110 ((193r - 42r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 01111 ((193r - 45r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10000 ((193r - 48r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10001 ((193r - 51r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10010 ((193r - 54r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10011 ((193r - 57r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10100 ((193r - 60r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10101 ((193r - 63r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10110 ((193r - 66r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 10111 ((193r - 69r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11000 ((193r - 72r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11001 ((193r - 75r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11010 ((193r - 78r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11011 ((193r - 81r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11100 ((193r - 84r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11101 ((193r - 87r) / 223r) * (vinn5 - v inn11) + vinn11 pkn3 4-0 = 11110 ((193r - 90r) / 223r) * (vinn5 - v inn11) + vinn11 vinn7 pkn3 4-0 = 11111 ((193r - 93r) / 223r) * (vinn5 - v inn11) + vinn11 table 5.40: vinn7 reference voltage macro adjustment value vinn8 formula pkn4 4-0 = 00000 (158r / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00001 ((158r - 3r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn4 4-0 = 00010 ((158r - 6r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn4 4-0 = 00011 ((158r - 9r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn4 4-0 = 00100 ((158r - 12r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 00101 ((158r - 15r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 00110 ((158r - 18r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 00111 ((158r - 21r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01000 ((158r - 24r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01001 ((158r - 27r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01010 ((158r - 30r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01011 ((158r - 33r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01100 ((158r - 36r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01101 ((158r - 39r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01110 ((158r - 42r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 01111 ((158r - 45r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10000 ((158r - 48r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10001 ((158r - 51r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10010 ((158r - 54r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10011 ((158r - 57r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10100 ((158r - 60r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10101 ((158r - 63r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10110 ((158r - 66r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 10111 ((158r - 69r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11000 ((158r - 72r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11001 ((158r - 75r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11010 ((158r - 78r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11011 ((158r - 81r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11100 ((158r - 84r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11101 ((158r - 87r) / 223r) * (vinn5 - v inn11) + vinn11 pkn4 4-0 = 11110 ((158r - 90r) / 223r) * (vinn5 - v inn11) + vinn11 vinn8 pkn4 4-0 = 11111 ((158r - 93r) / 223r) * (vinn5 - v inn11) + vinn11 table 5.41: vinn8 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.99- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn9 formula pkn5 4-0 = 00000 (123r / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00001 ((123r - 3r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn5 4-0 = 00010 ((123r - 6r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn5 4-0 = 00011 ((123r - 9r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn5 4-0 = 00100 ((123r - 12r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 00101 ((123r - 15r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 00110 ((123r - 18r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 00111 ((123r - 21r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01000 ((123r - 24r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01001 ((123r - 27r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01010 ((123r - 30r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01011 ((123r - 33r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01100 ((123r - 36r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01101 ((123r - 39r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01110 ((123r - 42r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 01111 ((123r - 45r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10000 ((123r - 48r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10001 ((123r - 51r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10010 ((123r - 54r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10011 ((123r - 57r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10100 ((123r - 60r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10101 ((123r - 63r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10110 ((123r - 66r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 10111 ((123r - 69r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11000 ((123r - 72r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11001 ((123r - 75r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11010 ((123r - 78r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11011 ((123r - 81r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11100 ((123r - 84r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11101 ((123r - 87r) / 223r) * (vinn5 - v inn11) + vinn11 pkn5 4-0 = 11110 ((123r - 90r) / 223r) * (vinn5 - v inn11) + vinn11 vinn9 pkn5 4-0 = 11111 ((123r - 93r) / 223r) * (vinn5 - v inn11) + vinn11 table 5.42: vinn9 reference voltage macro adjustment value vinn10 formula pkn6 4-0 = 00000 (96r / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00001 ((96r - 3r) / 223r) * (vinn5 - vin n11) + vinn11 pkn6 4-0 = 00010 ((96r - 6r) / 223r) * (vinn5 - vin n11) + vinn11 pkn6 4-0 = 00011 ((96r - 9r) / 223r) * (vinn5 - vin n11) + vinn11 pkn6 4-0 = 00100 ((96r - 12r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 00101 ((96r - 15r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 00110 ((96r - 18r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 00111 ((96r - 21r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01000 ((96r - 24r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01001 ((96r - 27r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01010 ((96r - 30r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01011 ((96r - 33r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01100 ((96r - 36r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01101 ((96r - 39r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01110 ((96r - 42r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 01111 ((96r - 45r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10000 ((96r - 48r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10001 ((96r - 51r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10010 ((96r - 54r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10011 ((96r - 57r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10100 ((96r - 60r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10101 ((96r - 63r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10110 ((96r - 66r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 10111 ((96r - 69r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11000 ((96r - 72r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11001 ((96r - 75r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11010 ((96r - 78r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11011 ((96r - 81r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11100 ((96r - 84r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11101 ((96r - 87r) / 223r) * (vinn5 - vi nn11) + vinn11 pkn6 4-0 = 11110 ((96r - 90r) / 223r) * (vinn5 - vi nn11) + vinn11 vinn10 pkn6 4-0 = 11111 ((96r - 93r) / 223r) * (vinn5 - vi nn11) + vinn11 table 5.43: vinn10 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.100- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 reference voltage macro adjustment value vinn12 formula pkn7 4-0 = 00000 (47r / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00001 ((47r - 1r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00010 ((47r - 2r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00011 ((47r - 3r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00100 ((47r - 4r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00101 ((47r - 5r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00110 ((47r - 6r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 00111 ((47r - 7r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 01000 ((47r - 8r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 01001 ((47r - 9r) / 48r) * (vinn11 - vin n14) + vinn14 pkn7 4-0 = 01010 ((47r - 10r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 01011 ((47r - 11r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 01100 ((47r - 12r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 01101 ((47r - 13r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 01110 ((47r - 14r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 01111 ((47r - 15r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10000 ((47r - 16r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10001 ((47r - 17r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10010 ((47r - 18r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10011 ((47r - 19r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10100 ((47r - 20r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10101 ((47r - 21r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10110 ((47r - 22r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 10111 ((47r - 23r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11000 ((47r - 24r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11001 ((47r - 25r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11010 ((47r - 26r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11011 ((47r - 27r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11100 ((47r - 28r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11101 ((47r - 29r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn7 4-0 = 11110 ((47r - 30r) / 48r) * (vinn11 - vi nn14) + vinn14 vinn12 pkn7 4-0 = 11111 ((47r - 31r) / 48r) * (vinn11 - vi nn14) + vinn14 table 5.44: vinn12 reference voltage macro adjustment value vinn13 formula pkn8 4-0 = 00000 (32r / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00001 ((32r - 1r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00010 ((32r - 2r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00011 ((32r - 3r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00100 ((32r - 4r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00101 ((32r - 5r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00110 ((32r - 6r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 00111 ((32r - 7r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 01000 ((32r - 8r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 01001 ((32r - 9r) / 48r) * (vinn11 - vin n14) + vinn14 pkn8 4-0 = 01010 ((32r - 10r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 01011 ((32r - 11r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 01100 ((32r - 12r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 01101 ((32r - 13r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 01110 ((32r - 14r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 01111 ((32r - 15r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10000 ((32r - 16r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10001 ((32r - 17r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10010 ((32r - 18r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10011 ((32r - 19r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10100 ((32r - 20r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10101 ((32r - 21r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10110 ((32r - 22r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 10111 ((32r - 23r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11000 ((32r - 24r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11001 ((32r - 25r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11010 ((32r - 26r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11011 ((32r - 27r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11100 ((32r - 28r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11101 ((32r - 29r) / 48r) * (vinn11 - vi nn14) + vinn14 pkn8 4-0 = 11110 ((32r - 30r) / 48r) * (vinn11 - vi nn14) + vinn14 vinn13 pkn8 4-0 = 11111 ((32r - 31r) / 48r) * (vinn11 - vi nn14) + vinn14 table 5.45: vinn13 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.101- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 grayscale voltage formula grayscale voltage formula v0 vinp0 v42 vinp9 - (vinp9 - vinp10)*(4r/6r) v1 vinp1 v43 vinp9 - (vinp9 - vinp10)*(5r/6r) v2 vinp2 v44 vinp10 v3 vinp3 v45 vinp10 - (vinp10 - vinp11)*(1r/6r) v4 vinp3 - (vinp3 - vinp4)*(1r/4r) v46 vinp10 - (vi np10 - vinp11)*(2r/6r) v5 vinp3 - (vinp3 - vinp4)*(2r/4r) v47 vinp10 - (vi np10 - vinp11)*(3r/6r) v6 vinp3 - (vinp3 - vinp4)*(3r/4r) v48 vinp10 - (vi np10 - vinp11)*(4r/6r) v7 vinp4 v49 vinp10 - (vinp10 - vinp11)*(5r/6r) v8 vinp4 - (vinp4 - vinp5)*(1r/6r) v50 vinp11 v9 vinp4 - (vinp4 - vinp5)*(2r/6r) v51 vinp11 - (vi np11 - vinp12)*(1r/6r) v10 vinp4 - (vinp4 - vinp5)*(3r/6r) v52 vinp11 - (v inp11- vinp12)*(2r/6r) v11 vinp4 - (vinp4 - vinp5)*(4r/6r) v53 vinp11 - (vinp11 - vinp12)*(3r/6r) v12 vinp4 - (vinp4 - vinp5)*(5r/6r) v54 vinp11 - (v inp11 - vinp12)*(4r/6r) v13 vinp5 v55 vinp11 - (vinp11- vinp12)*(5r/6r) v14 vinp5 - (vinp5 - vinp6)*(1r/6r) v56 vinp12 v15 vinp5 - (vinp5 - vinp6)*(2r/6r) v57 vinp12 - (vinp12 C vinp13)*(1r/4r) v16 vinp5 - (vinp5 - vinp6)*(3r/6r) v58 vinp12 - (vinp12 C vinp13)*(2r/4r) v17 vinp5 - (vinp5 - vinp6)*(4r/6r) v59 vinp12 - (v inp12 C vinp13)*(3r/4r) v18 vinp5 - (vinp5 - vinp6)*(5r/6r) v60 vinp13 v19 vinp6 v61 vinp14 v20 vinp6 - (vinp6 - vinp7)*(1r/6r) v62 vinp15 v21 vinp6 - (vinp6 - vinp7)*(2r/6r) v63 vinp16 v22 vinp6 - (vinp6 - vinp7)*(3r/6r) v23 vinp6 - (vinp6 - vinp7)*(4r/6r) v24 vinp6 - (vinp6 - vinp7)*(5r/6r) v25 vinp7 v26 vinp7 - (vinp7 - vinp8)*(1r/7.5r) v27 vinp7 - (vinp7 - vinp8)*(2r/7.5r) v28 vinp7 - (vinp7 - vinp8)*(3r/7.5r) v29 vinp7 - (vinp7 - vinp8)*(4r/7.5r) v30 vinp7 - (vinp7 - vinp8)*(5r/7.5r) v31 vinp7 - (vinp7 - vinp8)*(6r/7.5r) v32 vinp8 v33 vinp8 - (vinp8 - vinp9)*(1r/6r) v34 vinp8 - (vinp8 - vinp9)*(2r/6r) v35 vinp8 - (vinp8 - vinp9)*(3r/6r) v36 vinp8 - (vinp8 - vinp9)*(4r/6r) v37 vinp8 - (vinp8 - vinp9)*(5r/6r) v38 vinp9 v39 vinp9 - (vinp9 - vinp10)*(1r/6r) v40 vinp9 - (vinp9 - vinp10)*(2r/6r) v41 vinp9 - (vinp9 - vinp10)*(3r/6r) table 5.46: voltage calculation formula of 64-grays cale voltage (positive polarity) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.102- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 grayscale voltage formula grayscale voltage formula v0 vinn0 v42 vinn9 - (vinn9 - vinn10)*(4r/6r) v1 vinn1 v43 vinn9 - (vinn9 - vinn10)*(5r/6r) v2 vinn2 v44 vinn10 v3 vinn3 v45 vinn10 - (vinn10 - vinn11)*(1r/6r) v4 vinn3 - (vinn3 - vinn4)*(1r/4r) v46 vinn10 - (vi nn10 - vinn11)*(2r/6r) v5 vinn3 - (vinn3 - vinn4)*(2r/4r) v47 vinn10 - (vi nn10 - vinn11)*(3r/6r) v6 vinn3 - (vinn3 - vinn4)*(3r/4r) v48 vinn10 - (vi nn10 - vinn11)*(4r/6r) v7 vinn4 v49 vinn10 - (vinn10 - vinn11)*(5r/6r) v8 vinn4 - (vinn4 - vinn5)*(1r/6r) v50 vinn11 v9 vinn4 - (vinn4 - vinn5)*(2r/6r) v51 vinn11 - (vi nn11 - vinn12)*(1r/6r) v10 vinn4 - (vinn4 - vinn5)*(3r/6r) v52 vinn11 - (v inn11- vinn12)*(2r/6r) v11 vinn4 - (vinn4 - vinn5)*(4r/6r) v53 vinn11 - (v inn11 - vinn12)*(3r/6r) v12 vinn4 - (vinn4 - vinn5)*(5r/6r) v54 vinn11 - (v inn11 - vinn12)*(4r/6r) v13 vinn5 v55 vinn11 - (vinn11- vinn12)*(5r/6r) v14 vinn5 - (vinn5 - vinn6)*(1r/6r) v56 vinn12 v15 vinn5 - (vinn5 - vinn6)*(2r/6r) v57 vinn12 - (v inn12 C vinn13)*(1r/4r) v16 vinn5 - (vinn5 - vinn6)*(3r/6r) v58 vinn12 - (v inn12 C vinn13)*(2r/4r) v17 vinn5 - (vinn5 - vinn6)*(4r/6r) v59 vinn12 - (v inn12 C vinn13)*(3r/4r) v18 vinn5 - (vinn5 - vinn6)*(5r/6r) v60 vinn13 v19 vinn6 v61 vinn14 v20 vinn6 - (vinn6 - vinn7)*(1r/6r) v62 vinn15 v21 vinn6 - (vinn6 - vinn7)*(2r/6r) v63 vinn16 v22 vinn6 - (vinn6 - vinn7)*(3r/6r) v23 vinn6 - (vinn6 - vinn7)*(4r/6r) v24 vinn6 - (vinn6 - vinn7)*(5r/6r) v25 vinn7 v26 vinn7 - (vinn7 - vinn8)*(1r/7.5r) v27 vinn7 - (vinn7 - vinn8)*(2r/7.5r) v28 vinn7 - (vinn7 - vinn8)*(3r/7.5r) v29 vinn7 - (vinn7 - vinn8)*(4r/7.5r) v30 vinn7 - (vinn7 - vinn8)*(5r/7.5r) v31 vinn7 - (vinn7 - vinn8)*(6r/7.5r) v32 vinn8 v33 vinn8 - (vinn8 - vinn9)*(1r/6r) v34 vinn8 - (vinn8 - vinn9)*(2r/6r) v35 vinn8 - (vinn8 - vinn9)*(3r/6r) v36 vinn8 - (vinn8 - vinn9)*(4r/6r) v37 vinn8 - (vinn8 - vinn9)*(5r/6r) v38 vinn9 v39 vinn9 - (vinn9 - vinn10)*(1r/6r) v40 vinn9 - (vinn9 - vinn10)*(2r/6r) v41 vinn9 - (vinn9 - vinn10)*(3r/6r) table 5.47: voltage calculation formula of 64-grays cale voltage (negative polarity) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.103- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 grayscale voltage formula grayscale voltage formula vv0 v0 vv44 v11 vv1 v0 - (v0 - v1)*(4r/16r) vv45 v11 - (v11 - v12)*(1.6r/6.4r) vv2 v0 - (v0 - v1)*(8r/16r) vv46 v11 - (v11 - v12)*(3.2r/6.4r) vv3 v0 - (v0 - v1)*(12r/16r) vv47 v11 - (v11 - v12)*(4.8r/6.4r) vv4 v1 vv48 v12 vv5 v1 - (v1 - v2)*(4r/16r) vv49 v12 - (v12 - v13)*(1.6r/6.4r) vv6 v1 - (v1 - v2)*(8r/16r) vv50 v12 - (v12 - v13)*(3.2r/6.4r) vv7 v1 - (v1 - v2)*(12r/16r) vv51 v12 - (v12 - v13)*(4.8r/6.4r) vv8 v2 vv52 v13 vv9 v2 - (v2 - v3)*(4r/16r) vv53 v13 - (v13 - v14)*(1.6r/6.4r) vv10 v2 - (v2 - v3)*(8r/16r) vv54 v13 - (v13 - v14)*(3.2r/6.4r) vv11 v2 - (v2 - v3)*(12r/16r) vv55 v13 - (v13 - v14)*(4.8r/6.4r) vv12 v3 vv56 v14 vv13 v3 - (v3 - v4)*(2r/8r) vv57 v14 - (v14 - v15)*(1.6r/6.4r) vv14 v3 - (v3 - v4)*(4r/8r) vv58 v14 - (v14 - v15)*(3.2r/6.4r) vv15 v3 - (v3 - v4)*(6r/8r) vv59 v14 - (v14 - v15)*(4.8r/6.4r) vv16 v4 vv60 v15 vv17 v4 - (v4 - v5)*(2r/8r) vv61 v15 - (v15 - v16)*(1.6r/6.4r) vv18 v4 - (v4 - v5)*(4r/8r) vv62 v15 - (v15 - v16)*(3.2r/6.4r) vv19 v4 - (v4 - v5)*(6r/8r) vv63 v15 - (v15 - v16)*(4.8r/6.4r) vv20 v5 vv64 v16 vv21 v5 - (v5 - v6)*(2r/8r) vv65 v16 - (v16 - v17)*(1.6r/6.4r) vv22 v5 - (v5 - v6)*(4r/8r) vv66 v16 - (v16 - v17)*(3.2r/6.4r) vv23 v5 - (v5 - v6)*(6r/8r) vv67 v16 - (v16 - v17)*(4.8r/6.4r) vv24 v6 vv68 v17 vv25 v6 - (v6 - v7)*(2r/8r) vv69 v17 - (v17 - v18)*(1.6r/6.4r) vv26 v6 - (v6 - v7)*(4r/8r) vv70 v17 - (v17 - v18)*(3.2r/6.4r) vv27 v6 - (v6 - v7)*(6r/8r) vv71 v17 - (v17 - v18)*(4.8r/6.4r) vv28 v7 vv72 v18 vv29 v7 - (v7 - v8)*(1.6r/6.4r) vv73 v18 - (v18 - v19)*(1.6r/6.4r) vv30 v7 - (v7 - v8)*(3.2r/6.4r) vv74 v18 - (v18 - v19)*(3.2r/6.4r) vv31 v7 - (v7 - v8)*(4.8r/6.4r) vv75 v18 - (v18 - v19)*(4.8r/6.4r) vv32 v8 vv76 v19 vv33 v8 - (v8 - v9)*(1.6r/6.4r) vv77 v19 - (v19 - v20)*(1.6r/6.4r) vv34 v8 - (v8 - v9)*(3.2r/6.4r) vv78 v19 - (v19 - v20)*(3.2r/6.4r) vv35 v8 - (v8 - v9)*(4.8r/6.4r) vv79 v19 - (v19 - v20)*(4.8r/6.4r) vv36 v9 vv80 v20 vv37 v9 - (v9 - v10)*(1.6r/6.4r) vv81 v20 - (v20 - v21)*(1.6r/6.4r) vv38 v9 - (v9 - v10)*(3.2r/6.4r) vv82 v20 - (v20 - v21)*(3.2r/6.4r) vv39 v9 - (v9 - v10)*(4.8r/6.4r) vv83 v20 - (v20 - v21)*(4.8r/6.4r) vv40 v10 vv84 v21 vv41 v10 - (v10 - v11)*(1.6r/6.4r) vv85 v21 - (v21 - v22)*(1.6r/6.4r) vv42 v10 - (v10 - v11)*(3.2r/6.4r) vv86 v21 - (v21 - v22)*(3.2r/6.4r) vv43 v10 - (v10 - v11)*(4.8r/6.4r) vv87 v21 - (v21 - v22)*(4.8r/6.4r) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.104- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 grayscale voltage formula grayscale voltage formula vv88 v22 vv132 v32 - (v32 - v33)*(1.6r/6.4r) vv89 v22 - (v22 - v23)*(1.6r/6.4r) vv133 v32 - (v32 - v33)*(3.2r/6.4r) vv90 v22 - (v22 - v23)*(3.2r/6.4r) vv134 v32 - (v32 - v33)*(4.8r/6.4r) vv91 v22 - (v22 - v23)*(4.8r/6.4r) vv135 v33 vv92 v23 vv136 v33 - (v33 - v34)*(1.6r/6.4r) vv93 v23 - (v23 - v24)*(1.6r/6.4r) vv137 v33 - (v33 - v34)*(3.2r/6.4r) vv94 v23 - (v23 - v24)*(3.2r/6.4r) vv138 v33 - (v33 - v34)*(4.8r/6.4r) vv95 v23 - (v23 - v24)*(4.8r/6.4r) vv139 v34 vv96 v24 vv140 v34 - (v34 - v35)*(1.6r/6.4r) vv97 v24 - (v24 - v25)*(1.6r/6.4r) vv141 v34 - (v34 - v35)*(3.2r/6.4r) vv98 v24 - (v24 - v25)*(3.2r/6.4r) vv142 v34 - (v34 - v35)*(4.8r/6.4r) vv99 v24 - (v24 - v25)*(4.8r/6.4r) vv143 v35 vv100 v25 vv144 v35 - (v35 - v36)*(1.6r/6.4r) vv101 v25 - (v25 - v26)*(1.6r/6.4r) vv145 v35 - (v35 - v36)*(3.2r/6.4r) vv102 v25 - (v25 - v26)*(3.2r/6.4r) vv146 v35 - (v35 - v36)*(4.8r/6.4r) vv103 v25 - (v25 - v26)*(4.8r/6.4r) vv147 v36 vv104 v26 vv148 v36 - (v36 - v37)*(1.6r/6.4r) vv105 v26 - (v26 - v27)*(1.6r/6.4r) vv149 v36 - (v36 - v37)*(3.2r/6.4r) vv106 v26 - (v26 - v27)*(3.2r/6.4r) vv150 v36 - (v36 - v37)*(4.8r/6.4r) vv107 v26 - (v26 - v27)*(4.8r/6.4r) vv151 v37 vv108 v27 vv152 v37 - (v37 - v38)*(1.6r/6.4r) vv109 v27 - (v27 - v28)*(1.6r/6.4r) vv153 v37 - (v37 - v38)*(3.2r/6.4r) vv110 v27 - (v27 - v28)*(3.2r/6.4r) vv154 v37 - (v37 - v38)*(4.8r/6.4r) vv111 v27 - (v27 - v28)*(4.8r/6.4r) vv155 v38 vv112 v28 vv156 v38 - (v38 - v39)*(1.6r/6.4r) vv113 v28 - (v28 - v29)*(1.6r/6.4r) vv157 v38 - (v38 - v39)*(3.2r/6.4r) vv114 v28 - (v28 - v29)*(3.2r/6.4r) vv158 v38 - (v38 - v39)*(4.8r/6.4r) vv115 v28 - (v28 - v29)*(4.8r/6.4r) vv159 v39 vv116 v29 vv160 v39 - (v39 - v40)*(1.6r/6.4r) vv117 v29 - (v29 - v30)*(1.6r/6.4r) vv161 v39 - (v39 - v40)*(3.2r/6.4r) vv118 v29 - (v29 - v30)*(3.2r/6.4r) vv162 v39 - (v39 - v40)*(4.8r/6.4r) vv119 v29 - (v29 - v30)*(4.8r/6.4r) vv163 v40 vv120 v30 vv164 v40 - (v40 - v41)*(1.6r/6.4r) vv121 v30 - (v30 - v31)*(1.6r/6.4r) vv165 v40 - (v40 - v41)*(3.2r/6.4r) vv122 v30 - (v30 - v31)*(3.2r/6.4r) vv166 v40 - (v40 - v41)*(4.8r/6.4r) vv123 v30 - (v30 - v31)*(4.8r/6.4r) vv167 v41 vv124 v31 vv168 v41 - (v41 - v42)*(1.6r/6.4r) vv125 v31 - (v31 - v32)*(1.6r/11.2r) vv169 v41 - (v41 - v42)*(3.2r/6.4r) vv126 v31 - (v31 - v32)*(3.2r/11.2r) vv170 v41 - (v41 - v42)*(4.8r/6.4r) vv127 v31 - (v31 - v32)*(4.8r/11.2r) vv171 v42 vv128 v31 - (v31 - v32)*(6.4r/11.2r) vv172 v42 - (v42 - v43)*(1.6r/6.4r) vv129 v31 - (v31 - v32)*(8r/11.2r) vv173 v42 - (v42 - v43)*(3.2r/6.4r) vv130 v31 - (v31 - v32)*(9.6r/11.2r) vv174 v42 - (v42 - v43)*(4.8r/6.4r) vv131 v32 vv175 v43 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.105- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 grayscale voltage formula grayscale voltage formula vv176 v43 - (v43 - v44)*(1.6r/6.4r) vv216 v53 - (v53 - v54)*(1.6r/6.4r) vv177 v43 - (v43 - v44)*(3.2r/6.4r) vv217 v53 - (v53 - v54)*(3.2r/6.4r) vv178 v43 - (v43 - v44)*(4.8r/6.4r) vv218 v53 - (v53 - v54)*(4.8r/6.4r) vv179 v44 vv219 v54 vv180 v44 - (v44 - v45)*(1.6r/6.4r) vv220 v54 - (v54 - v55)*(1.6r/6.4r) vv181 v44 - (v44 - v45)*(3.2r/6.4r) vv221 v54 - (v54 - v55)*(3.2r/6.4r) vv182 v44 - (v44 - v45)*(4.8r/6.4r) vv222 v54 - (v54 - v55)*(4.8r/6.4r) vv183 v45 vv223 v55 vv184 v45 - (v45 - v46)*(1.6r/6.4r) vv224 v55 - (v55 - v56)*(1.6r/6.4r) vv185 v45 - (v45 - v46)*(3.2r/6.4r) vv225 v55 - (v55 - v56)*(3.2r/6.4r) vv186 v45 - (v45 - v46)*(4.8r/6.4r) vv226 v55 - (v55 - v56)*(4.8r/6.4r) vv187 v46 vv227 v56 vv188 v46 - (v46 - v47)*(1.6r/6.4r) vv228 v56 - (v56 - v57)*(2r/8r) vv189 v46 - (v46 - v47)*(3.2r/6.4r) vv229 v56 - (v56 - v57)*(4r/8r) vv190 v46 - (v46 - v47)*(4.8r/6.4r) vv230 v56 - (v56 - v57)*(6r/8r) vv191 v47 vv231 v57 vv192 v47 - (v47 - v48)*(1.6r/6.4r) vv232 v57 - (v57 - v58)*(2r/8r) vv193 v47 - (v47 - v48)*(3.2r/6.4r) vv233 v57 - (v57 - v58)*(4r/8r) vv194 v47 - (v47 - v48)*(4.8r/6.4r) vv234 v57 - (v57 - v58)*(6r/8r) vv195 v48 vv235 v58 vv196 v48 - (v48 - v49)*(1.6r/6.4r) vv236 v58 - (v58 - v59)*(2r/8r) vv197 v48 - (v48 - v49)*(3.2r/6.4r) vv237 v58 - (v58 - v59)*(4r/8r) vv198 v48 - (v48 - v49)*(4.8r/6.4r) vv238 v58 - (v58 - v59)*(6r/8r) vv199 v49 vv239 v59 vv200 v49 - (v49 - v50)*(1.6r/6.4r) vv240 v59 - (v59 - v60)*(2r/8r) vv201 v49 - (v49 - v50)*(3.2r/6.4r) vv241 v59 - (v59 - v60)*(4r/8r) vv202 v49 - (v49 - v50)*(4.8r/6.4r) vv242 v59 - (v59 - v60)*(6r/8r) vv203 v50 vv243 v60 vv204 v50 - (v50 - v51)*(1.6r/6.4r) vv244 v60 - (v60 - v61)*(4r/16r) vv205 v50 - (v50 - v51)*(3.2r/6.4r) vv245 v60 - (v60 - v61)*(8r/16r) vv206 v50 - (v50 - v51)*(4.8r/6.4r) vv246 v60 - (v60 - v61)*(12r/16r) vv207 v51 vv247 v61 vv208 v51 - (v51 - v52)*(1.6r/6.4r) vv248 v61 - (v61 - v62)*(4r/16r) vv209 v51 - (v51 - v52)*(3.2r/6.4r) vv249 v61 - (v61 - v62)*(8r/16r) vv210 v51 - (v51 - v52)*(4.8r/6.4r) vv250 v61 - (v61 - v62)*(12r/16r) vv211 v52 vv251 v62 vv212 v52 - (v52 - v53)*(1.6r/6.4r) vv252 v62 - (v62 - v63)*(4r/16r) vv213 v52 - (v52 - v53)*(3.2r/6.4r) vv253 v62 - (v62 - v63)*(8r/16r) vv214 v52 - (v52 - v53)*(4.8r/6.4r) vv254 v62 - (v62 - v63)*(12r/16r) vv215 v53 vv255 v63 table 5.48: voltage calculation formula of 256-gray scale voltage (positive/negative polarity) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.106- HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 5.12 characteristics of i/o 5.12.1 output or bi-directional (i/o) pins output or bi-directional pins after power on after hardware reset after software reset te low low low db23 to db0 (output driver) high-z (inactive) high-z (inactive) high-z (inactiv e) sdo high-z (inactive) high-z (inactive) high-z (ina ctive) cabc_pwm_out low low low table 5.49: characteristics of output or bi-directi onal (i/o) pins 5.12.2 input pins input pins during power on process after power on after hardware reset after software reset during power off process resx setion.5.18 input valid input valid input vali d setion.5.18 csx input valid input valid input valid input valid input valid dcx input valid input valid input valid input valid input valid wrx_scl input valid input valid input valid input v alid input valid rdx input valid input valid input valid input valid input valid db23 to db0 sdi input valid input valid input valid input valid inp ut valid hsync input valid input valid input valid input val id input valid vsync input valid input valid input valid input val id input valid pclk input valid input valid input valid input vali d input valid de input valid input valid input valid input valid input valid osc, bs3, bs2, bs1, bs0, input valid input valid input valid input valid inp ut valid test2-0 low low low low low table 5.50: characteristics of input pins ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.107- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.13 sleep out Ccommand and self-diagnostic functio ns of the display module 5.13.1 register loading detection sleep out-command (see sleep out (11h)) is a trig ger for an internal function of the display module, which indicates, if the display mod ule loading function of factory default values from otp (or similar device) to regi sters of the display controller is working properly. there are compared factory values of the otp and register values of the display controller by the display controller . if those both values (otp and register values) are same, there is inverted (=incr eased by 1) a bit, which is defined in command read display self-diagnostic result (0fh) (=rddsdr) (the used bit of this command is d7). if those both values are not s ame, this bit (d7) is not inverted (=increased by 1). the flow chart for this internal function is follow ing: figure 5.33: sleep out flow chartCcommand and self- diagnostic functions ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.108- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.13.2 functionality detection sleep out-command (see sleep out (11h)) is a trig ger for an internal function of the display module, which indicates, if the display mod ule is still running and meets functionality requirements. the internal function (=the display controller) is comparing, if the display module still meets functionality requirements (e.g. booster volt age levels, timings, etc.). if functionality requirement is met, 1 bit will be inv erted (=increased by 1), which is defined in command read display self- diagnostic r esult (0fh) (=rddsdr) (the used bit of this command is d6). if functionality r equirement is not the same, this bit (d6) is not inverted (=increased by 1). the flow ch art for this internal function is shown as below. sleep in (10h) sleep out mode sleep in mode sleep out (11h) checks timings, voltage levels and other functionalities is functionality requirement meet ? d6 inverted rddsdr`s d6=0 power on sequence hw reset sw reset yes no note: there is needed 120msec after sleep out -command, wh en there is changing from sleep inCmode tosleep out -mode, before there is possible to check if customers functionality requirements are met a nd a value of rddsdrs d6 is valid. otherwise, there is 5msec delay for d6s value, when sleep out Ccommand is sent in sleep out -mode. figure 5.34: sleep out flow chart internal function detection ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.109- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.14 power on/off sequence vdd1, vdd2 and vdd3 can be applied in any order. vd d1, vdd2 and vdd3 can be powered down in any order. during power off, if lcd is in the sleep out mode, vdd1 and vdd2 must be powered down minimum 120msec after resx has been released. during power off, if lcd is in the sleep in mode, v dd1, vdd2 and vdd3 can be powered down minimum 0msec after resx has been rele ased. csx can be applied at any timing or can be permanently grounded. resx has priority over csx. there will be no damage to the display module if the powe r sequences are not met. there will be no abnormal visible effects on the display panel during the power on/off sequences. there will be no abnormal visible effect s on the display between end of power on sequence and before receiving sleep out co mmand. also between receiving sleep in command and power off sequence. if resx line is not held stable by host during power on sequence as defined in sect ions 5.16.1 and 5.16.2, then it will be necessary to apply a hardware reset (resx) after host power on sequence is complete to ensure correct operation. otherwise function is not guaranteed. the power on/off sequence is illustrated below. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.110- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.14.1 case 1: resx line is held high or unstable b y host at power on if resx line is held high or unstable by the host d uring power on, then a hardware reset must be applied after both vdd1, vdd2 and vdd 3 have been applied- otherwise correct functionality is not guaranteed. there is no timing restriction upon this hardware reset. vdd2 vdd3 vdd1 csx resx resx trpw= +/- no limit tfpw= +/- no limit trpwics= +/- no limit tfpwics= +/- no limit h or l trpwires= + no limit trpwires= + no limit tfpwires1= min 120ms tfpwires2= min 0ns (power down in sleep out mode) (power down in sleep in mode) tfpwires1 is applied to resx falling in the sleep ou t mode tfpwires2 is applied to resx falling in the sleep in mode time when the latter signal rises up to 90% of its typica l value. ex. when vdd2/vdd3 comes latter. this time is defined at the cross point of 9 0% of 2.5v/2.75v. time when the former signal falls down to 90% of its t ypical value. ex. when vdd2/vdd3 falls earilier. this time is defined at the cross point o f 90% of 2.5v/2.75v. figure 5.35: case 1: resx line is held high or unst able by host at power on ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.111- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.14.2 case 2: resx line is held low by host at pow er on if resx line is held low (and stable) by the host d uring power on, then the resx must be held low for minimum 10 sec after both vdd1, vdd2 and vdd3 have been applied. figure 5.36: case 2: resx line is held low by host at power on 5.15 uncontrolled power off the uncontrolled power off means a situation when e .g. there is removed a battery without the controlled power off sequence. there wi ll not be any damages for the display module or the display module will not cause any damages for the host or lines of the interface. at an uncontrolled power off the display will go blank and there will not be any visible effects within 1 second on the d isplay (blank display) and remains blank until power on sequence powers it up. note: HX8392-A is support the noise reject filter (20ns) to reject spike or noise. vdd2 vdd3 vdd2 csx resx resx trpw= +/- no limit tfpw= +/- no limit trpwics= +/- no limit tfpwics= +/- no limit h or l trpwires= min 10us trpwires= min 10us tfpwires1= min 120ms tfpwires2= min 0ns tfpwires1 is applied to resx falling in the sleep o ut mode tfpwires2 is applied to resx falling in the time when the latter signal rises up to 90% of its typical value. ex. when vdd2/vdd3 comes latter. this time is defined at the cross point of 90% of 2 .5v/2.75v time when the former signal falls down to 90% of its typical value. ex. when vdd2/vdd3 falls earilier. this time is defined at the cross point of 90% of 2 .5v/2.75v. (power down in sleep out mode) (power down in sleep in mode) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.112- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.16 content adaptive brightness control (cabc) fun ction the general block diagram of the cabc and the brigh tness control is illustrated below: external vsync, hsync, enable, dck (rgb interface) image data display control signal generator display data generator display data contents analysis cabc gain / duty brightness control block pwm clock devider pwm_clk (foscd) cabc block dbv[7:0] (r52h) (bl=0) c[1:0]= 00 off c[1:0]= 01, 10, 11 off sel_pwmclk[2:0] c9h) pwm_out (bl=1) cabc[1:0] (r55h) savepower[6:0] (rc9h) dbg0~8[6:0] (rcah) dbv[7:0] (r51h) bctrl, bl(r53h) cmb[7:0](r5eh) invplus sel_blduty pwm_period (rc9h) figure 5.37: cabc block diagram ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.113- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.16.1 module architectures HX8392-A can support two module architectures for c abc operation. the bl bit setting of r53h can be used to select used display module architecture. white led driver circuit for display backlight is located on the main pwb, not in the display module both in architecture i and ii. architecture i architecture ii figure 5.38: module architecture ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.114- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.16.2 cabc block there are dbg0~8[6:0] register bits in cabc block t o define the cabc gain/ cabc duty table. every dbgx[6:0] has 33 gain/duty value setting. after one-frame display data content analysis, lsi will generate one cabc gain / cabc duty value calculated from dbg0~8[6:0] registe r bits setting (by using interpolated method) for display data generating an d for backlight pwm pulse generating. please note that the cabc gain / cabc duty value ca lculated by the lsi is one of the 33 gain/duty value setting in dbgxx[6:0]. please note that : duty ( valid level period (led o n) / one complete period)=1/ gain. gain curve dbg0 dbg1 dbg2 dbg3 dbg4 dbg5 dbg6 dbg7 dbg8 32 64 0 96 128 160 192 224 256 gain savepower one frame display data content analysis figure 5.39: cabc gain / cabc duty generation for power saving of backlight module, there are sav epower[6:0] bits to define the minimum gain/ maximum duty of cabc block output . if the cabc gain / duty after one-frame display data contents analysis is smaller (gain) / larger(duty) than savepower[6:0] bits setting, the cabc block will ou tput cabc gain / duty equal to savepower[6:0] and ignore the result of display dat a contents analysis. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.115- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.16.3 brightness control block there is an external output signal from brightness block, cabc_pwm_out, to control the led driver ic in order to control displ ay brightness. there are resister bits, dbv[7:0] of r51h, for disp lay brightness of manual brightness setting. the cabc_pwm_out duty is calculated as (db v[7:0])/255 x cabc duty (generated after one-frame display data content ana lysis). for ex: cabc_pwm_out period=2.95 ms, and dbv[7:0](r 51h)=228dec and cabc duty is 74%. then cabc_pwm_out duty=(228) / 25 5 x 74.42% o 66.54%. correspond to the cabc_pwm_out period=2.95 ms, the high-level of cabc_pwm_out (high effective) = 1.96ms, and the low -level of cabc_pwm_out =0.99ms. figure 5.40: cabc_pwm_out output duty symbol parameter min. max. unit description tpw pulse width 0.0333 8.33 ms - table 5.51: cabc timing table note1: the signal rise and fall times (tf, tr) are stipul ated to be equal to or less than 15ns. note2: the pulse width range by setting cabc related regist ers is locate between 0.0333ms to 8.33ms. when architecture ii module is used (bl=0) with t he example below, the cabc_pwm_out is always output low and the dbv[7:0]( r51h) will be read a value as 169dec ((169)/255 o 66.27%). on off cabc _ pwm _ out ( = ` 1 `) duty = 100 % maximum duty = 33 % duty = 66 . 57 % duty = 100 % off one period (tpw) display brightness invplus ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.116- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.16.4 minimum brightness setting of cabc function cabc function is automatically reduced backlight br ightness based on image contents. in the case of the combination with the c abc or manual brightness setting, display brightness is too dark. it must affect to i mage quality degradation. cabc minimum brightness setting (cmb[7:0] bits of r5eh) is to avoid too much brightness reduction. when cabc is active, cabc can not reduce the displa y brightness to less than cabc minimum brightness setting. image processing f unction is worked as normal, even if the brightness can not be changed. this function does not affect to the other function , manual brightness setting. manual brightness can be set the display brightness to les s than cabc minimum brightness. smooth transition and dimming function can be worke d as normal. when display brightness is turned off (bctrl=0 of r53h), cabc minimum brightness setting is ignored. cmb[7:0], read cabc minimum brightness (r5fh) always read the setting value of cmb[7:0], write cabc minimum brightness (r5eh) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.117- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.17 otp programing 5.17.1 otp table otp_index (hex) ref. command b7 b6 b5 b4 b3 b2 b1 b0 49 nvalid_28 - - tx_osc - - lan_num[1:0] 4a setmipi - - - - - - tx_delay[1:0] 4c nvalid_14 sel_pwmclk[2:0] sel_gain[1:0] invpuls sel_blduty 4d pwm_period[7:0] 4e cabc_fsync dim_frame[6:0] 4f cabc_step[7:0] 50 setcabc cabc_clken[7:0] 51 nvalid_15 dbg0[6:0] 52 - dbg1[6:0] 53 - dbg2[6:0] 54 - dbg3[6:0] 55 - dbg4[6:0] 56 - dbg5[6:0] 57 - dbg6[6:0] 58 - dbg7[6:0] 59 - dbg8[6:0] 5a setcabcgain_ui cabc_dd0 savepower0[6:0] 5b nvalid_16 dbg0[6:0] 5c - dbg1[6:0] 5d - dbg2[6:0] 5e - dbg3[6:0] 5f - dbg4[6:0] 60 - dbg5[6:0] 61 - dbg6[6:0] 62 - dbg7[6:0] 63 - dbg8[6:0] 64 setcabcgain_st cabc_dd1 savepower1[6:0] 65 nvalid_17 dbg0[6:0] 66 - dbg1[6:0] 67 - dbg2[6:0] 68 - dbg3[6:0] 69 - dbg4[6:0] 6a - dbg5[6:0] 6b - dbg6[6:0] 6c - dbg7[6:0] 6d - dbg8[6:0] 6e setcabcgain_mv cabc_dd2 savepower2[6:0] 7c nvalid_vcm1 - - - - - - - 7d setvcmc_1 vcmc_1[7:0] 7e nvalid_vcm2 - - - - - - - 7f setvcmc_2 vcmc_2[7:0] 80 nvalid_vcm3 - - - - - - - 81 setvcmc_3 vcmc_3[7:0] 82 nvalid_id1 - - - - - - - 83 id1_1[7:0] 84 id2_1[7:0] 85 setid_1 id3_1[7:0] 86 nvalid_id2 - - - - - - - 87 id1_2[7:0] 88 id2_2[7:0] 89 setid_2 id3_2[7:0] 8a nvalid_id3 - - - - - - - 8b id1_3[7:0] 8c id2_3[7:0] 8d setid_3 id3_3[7:0] 8e setpanel nvalid_20 - - - ss_panel gs_panel rev_pane bgr_panel 8f setrgbif nvalid_21 - - - dpl hspl vspl epl 90 setosc nvalid_22 - - - uadj[3:0] 91 nvalid_23 - - - - - - dstb 92 - fs1[2:0] - ap[2:0] 93 vghs[3:0] vgls[3:0] 94 dt[1:0] - - - - - - 95 - - - btp[4:0] 96 - - - btn[4:0] 97 vrhp[7:0] 98 vrhn[7:0] 99 - - vrmp[5:0] 9a setpower - - vrmn[5:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.118- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 9b - apf_en dd_tu vpnl_en - - pccs[1:0] 9c - dc86_div3 dc86_div2 dc86_div1 dc86_div0 xdk1 xdk0 auto_xdk a3 nvalid_24 - - - - - - - a4 nl[7:0] a5 bp [7:0] a6 fp [7:0] a7 rtn[7:0] a8 sap[3:0] init_disp init_set[2:0] a9 gen_on[7:0] aa gen_off[7:0] ab bp_pe [7:0] ac fp_pe [7:0] ad rtn_pe[7:0] ae setdisp - res_sel[2:0] tgs[3:0] af nvalid_25 - - - tei[3:0] b0 - - - - - tep[10:8] b1 sette tep[7:0] b2 nvalid_26 - nw_pe[2:0] nw[2:0] b3 - - - - shr[11:8] b4 shr[7:0] b5 son[7:0] b6 soff[7:0] b7 chr[7:0] b8 con[7:0] b9 coff[7:0] ba shp[3:0] - - - - bb chp[3:0] ccp[3:0] bc n_t1[7:0] bd n_t2[7:0] be n_t3[7:0] bf n_t4[7:0] c0 n_t5[7:0] c1 n_t6[7:0] c2 n_t7[7:0] c3 n_t8[7:0] c4 n_t9[7:0] c5 setmpucyc - - - - eqt[3:0] c9 nvalid_27 - nw_pe[2:0] nw[2:0] ca - - - - shr[11:8] cb shr[7:0] cc son[7:0] cd soff[7:0] ce chr[7:0] cf con[7:0] d0 coff[7:0] d1 shp[3:0] - - - - d2 chp[3:0] ccp[3:0] d3 n_t1[7:0] d4 n_t2[7:0] d5 n_t3[7:0] d6 n_t4[7:0] d7 n_t5[7:0] d8 n_t6[7:0] d9 n_t7[7:0] da n_t8[7:0] db n_t9[7:0] dc setrgbcyc - - - - eqt[3:0] f7 nvalid_30 - g0_r_vrp0[5:0] f8 - - g0_r_vrp1[5:0] f9 - - g0_r_vrp2[5:0] fa - - g0_r_vrp3[5:0] fb - - g0_r_vrp4[5:0] fc - - g0_r_vrp5[5:0] fd - g1_r_prp0[6:0] fe - g0_r_prp1[6:0] ff - - - g0_r_ pkp0[4:0] 100 - - - g0_r_pkp1[4:0] 101 - - - g0_r_pkp2[4:0] 102 - - - g0_r_pkp3[4:0] 103 - - - g0_r_pkp4[4:0] 104 - - - g0_r_pkp5[4:0] 105 - - - g0_r_pkp6[4:0] 106 - - - g0_r_pkp7[4:0] 107 setrgamma (gc0) - - - g0_r_pkp8[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.119- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 108 - - g0_r_vrn0[5:0] 109 - - g0_r_vrn1[5:0] 10a - - g0_r_vrn2[5:0] 10b - - g0_r_vrn3[5:0] 10c - - g0_r_vrn4[5:0] 10d - - g0_r_vrn5[5:0] 10e - g0_r_prn0[6:0] 10f - g0_r_prn1[6:0] 110 - - - g0_r_pkn0[4:0] 111 - - - g0_r_pkn1[4:0] 112 - - - g0_r_pkn2[4:0] 113 - - - g0_r_pkn3[4:0] 114 - - - g0_r_pkn4[4:0] 115 - - - g0_r_pkn5[4:0] 116 - - - g0_r_pkn6[4:0] 117 - - - g0_r_pkn7[4:0] 118 - - - g0_r_pkn8[4:0] 119 nvalid_31 - g0_g_vrp0[5:0] 11a - - g0_g_vrp1[5:0] 11b - - g0_g_vrp2[5:0] 11c - - g0_g_vrp3[5:0] 11d - - g0_g_vrp4[5:0] 11e - - g0_g_vrp5[5:0] 11f - g0_g_prp0[6:0] 120 - g0_g_prp1[6:0] 121 - - - g0_g_ pkp0[4:0] 122 - - - g0_g_pkp1[4:0] 123 - - - g0_g_pkp2[4:0] 124 - - - g0_g_pkp3[4:0] 125 - - - g0_g_pkp4[4:0] 126 - - - g0_g_pkp5[4:0] 127 - - - g0_g_pkp6[4:0] 128 - - - g0_g_pkp7[4:0] 129 - - - g0_g_pkp8[4:0] 12a - - g0_g_vrn0[5:0] 12b - - g0_g_vrn1[5:0] 12c - - g0_g_vrn2[5:0] 12d - - g0_g_vrn3[5:0] 12e - - g0_g_vrn4[5:0] 12f - - g0_g_vrn5[5:0] 130 - g0_g_prn0[6:0] 131 - g0_g_prn1[6:0] 132 - - - g0_g_pkn0[4:0] 133 - - - g0_g_pkn1[4:0] 134 - - - g0_g_pkn2[4:0] 135 - - - g0_g_pkn3[4:0] 136 - - - g0_g_pkn4[4:0] 137 - - - g0_g_pkn5[4:0] 138 - - - g0_g_pkn6[4:0] 139 - - - g0_g_pkn7[4:0] 13a setggamma (gc0) - - - g0_g_pkn8[4:0] 13b nvalid_32 - g0_b_vrp0[5:0] 13c - - g0_b_vrp1[5:0] 13d - - g0_b_vrp2[5:0] 13e - - g0_b_vrp3[5:0] 13f - - g0_b_vrp4[5:0] 140 - - g0_b_vrp5[5:0] 141 - g0_b_prp0[6:0] 142 - g0_b_prp1[6:0] 143 - - - g0_b_ pkp0[4:0] 144 - - - g0_b_pkp1[4:0] 145 - - - g0_b_pkp2[4:0] 146 - - - g0_b_pkp3[4:0] 147 - - - g0_b_pkp4[4:0] 148 - - - g0_b_pkp5[4:0] 149 - - - g0_b_pkp6[4:0] 14a - - - g0_b_pkp7[4:0] 14b - - - g0_b_pkp8[4:0] 14c - - g0_b_vrn0[5:0] 14d - - g0_b_vrn1[5:0] 14e - - g0_b_vrn2[5:0] 14f - - g0_b_vrn3[5:0] 150 - - g0_b_vrn4[5:0] 151 - - g0_b_vrn5[5:0] 152 setbgamma (gc0) - g0_b_prn0[6:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.120- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 153 - g0_b_prn1[6:0] 154 - - - g0_b_pkn0[4:0] 155 - - - g0_b_pkn1[4:0] 156 - - - g0_b_pkn2[4:0] 157 - - - g0_b_pkn3[4:0] 158 - - - g0_b_pkn4[4:0] 159 - - - g0_b_pkn5[4:0] 15a - - - g0_b_pkn6[4:0] 15b - - - g0_b_pkn7[4:0] 15c - - - g0_b_pkn8[4:0] 15d nvalid_33 - g1_r_vrp0[5:0] 15e - - g1_r_vrp1[5:0] 15f - - g1_r_vrp2[5:0] 160 - - g1_r_vrp3[5:0] 161 - - g1_r_vrp4[5:0] 162 - - g1_r_vrp5[5:0] 163 - g1_r_prp0[6:0] 164 - g1_r_prp1[6:0] 165 - - - g1_r_ pkp0[4:0] 166 - - - g1_r_pkp1[4:0] 167 - - - g1_r_pkp2[4:0] 168 - - - g1_r_pkp3[4:0] 169 - - - g1_r_pkp4[4:0] 16a - - - g1_r_pkp5[4:0] 16b - - - g1_r_pkp6[4:0] 16c - - - g1_r_pkp7[4:0] 16d - - - g1_r_pkp8[4:0] 16e - - g1_r_vrn0[5:0] 16f - - g1_r_vrn1[5:0] 170 - - g1_r_vrn2[5:0] 171 - - g1_r_vrn3[5:0] 172 - - g1_r_vrn4[5:0] 173 - - g1_r_vrn5[5:0] 174 - g1_r_prn0[6:0] 175 - g1_r_prn1[6:0] 176 - - - g1_r_pkn0[4:0] 177 - - - g1_r_pkn1[4:0] 178 - - - g1_r_pkn2[4:0] 179 - - - g1_r_pkn3[4:0] 17a - - g1_r_pkn4[4:0] 17b - - - g1_r_pkn5[4:0] 17c - - - g1_r_pkn6[4:0] 17d - - - g1_r_pkn7[4:0] 17e setrgamma (gc1) - - - g1_r_pkn8[4:0] 17f nvalid_34 - g1_g_vrp0[5:0] 180 - - g1_g_vrp1[5:0] 181 - - g1_g_vrp2[5:0] 182 - - g1_g_vrp3[5:0] 183 - - g1_g_vrp4[5:0] 184 - - g1_g_vrp5[5:0] 185 - g1_g_prp0[6:0] 186 - g1_g_prp1[6:0] 187 - - - g1_g_ pkp0[4:0] 188 - - - g1_g_pkp1[4:0] 189 - - - g1_g_pkp2[4:0] 18a - - - g1_g_pkp3[4:0] 18b - - - g1_g_pkp4[4:0] 18c - - - g1_g_pkp5[4:0] 18d - - - g1_g_pkp6[4:0] 18e - - - g1_g_pkp7[4:0] 18f - - - g1_g_pkp8[4:0] 190 - - g1_g_vrn0[5:0] 191 - - g1_g_vrn1[5:0] 192 - - g1_g_vrn2[5:0] 193 - - g1_g_vrn3[5:0] 194 - - g1_g_vrn4[5:0] 195 - - g1_g_vrn5[5:0] 196 - g1_g_prn0[6:0] 197 - g1_g_prn1[6:0] 198 - - - g1_g_pkn0[4:0] 199 - - - g1_g_pkn1[4:0] 19a - - - g1_g_pkn2[4:0] 19b - - - g1_g_pkn3[4:0] 19c - - - g1_g_pkn4[4:0] 19d setggamma (gc1) - - - g1_g_pkn5[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.121- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 19e - - - g1_g_pkn6[4:0] 19f - - - g1_g_pkn7[4:0] 1a0 - - - g1_g_pkn8[4:0] 1a1 nvalid_35 - g1_b_vrp0[5:0] 1a2 - - g1_b_vrp1[5:0] 1a3 - - g1_b_vrp2[5:0] 1a4 - - g1_b_vrp3[5:0] 1a5 - - g1_b_vrp4[5:0] 1a6 - - g1_b_vrp5[5:0] 1a7 - g1_b_prp0[6:0] 1a8 - g1_b_prp1[6:0] 1a9 - - - g1_b_ pkp0[4:0] 1aa - - - g1_b_pkp1[4:0] 1ab - - - g1_b_pkp2[4:0] 1ac - - - g1_b_pkp3[4:0] 1ad - - - g1_b_pkp4[4:0] 1ae - - - g1_b_pkp5[4:0] 1af - - - g1_b_pkp6[4:0] 1b0 - - - g1_b_pkp7[4:0] 1b1 - - - g1_b_pkp8[4:0] 1b2 - - g1_b_vrn0[5:0] 1b3 - - g1_b_vrn1[5:0] 1b4 - - g1_b_vrn2[5:0] 1b5 - - g1_b_vrn3[5:0] 1b6 - - g1_b_vrn4[5:0] 1b7 - - g1_b_vrn5[5:0] 1b8 - g1_b_prn0[6:0] 1b9 - g1_b_prn1[6:0] 1ba - - - g1_b_pkn0[4:0] 1bb - - - g1_b_pkn1[4:0] 1bc - - - g1_b_pkn2[4:0] 1bd - - - g1_b_pkn3[4:0] 1be - - - g1_b_pkn4[4:0] 1bf - - - g1_b_pkn5[4:0] 1c0 - - - g1_b_pkn6[4:0] 1c1 - - - g1_b_pkn7[4:0] 1c2 setbgamma (gc1) - - - g1_b_pkn8[4:0] 1c3 nvalid_36 - g2_r_vrp0[5:0] 1c4 - - g2_r_vrp1[5:0] 1c5 - - g2_r_vrp2[5:0] 1c6 - - g2_r_vrp3[5:0] 1c7 - - g2_r_vrp4[5:0] 1c8 - - g2_r_vrp5[5:0] 1c9 - g2_r_prp0[6:0] 1ca - g2_r_prp1[6:0] 1cb - - - g2_r_ pkp0[4:0] 1cc - - - g2_r_pkp1[4:0] 1cd - - - g2_r_pkp2[4:0] 1ce - - - g2_r_pkp3[4:0] 1cf - - - g2_r_pkp4[4:0] 1d0 - - - g2_r_pkp5[4:0] 1d1 - - - g2_r_pkp6[4:0] 1d2 - - - g2_r_pkp7[4:0] 1d3 - - - g2_r_pkp8[4:0] 1d4 - - g2_r_vrn0[5:0] 1d5 - - g2_r_vrn1[5:0] 1d6 - - g2_r_vrn2[5:0] 1d7 - - g2_r_vrn3[5:0] 1d8 - - g2_r_vrn4[5:0] 1d9 - - g2_r_vrn5[5:0] 1da - g2_r_prn0[6:0] 1db - g2_r_prn1[6:0] 1dc - - - g2_r_pkn0[4:0] 1dd - - - g2_r_pkn1[4:0] 1de - - - g2_r_pkn2[4:0] 1df - - - g2_r_pkn3[4:0] 1e0 - - - g2_r_pkn4[4:0] 1e1 - - - g2_r_pkn5[4:0] 1e2 - - - g2_r_pkn6[4:0] 1e3 - - - g2_r_pkn7[4:0] 1e4 setrgamma (gc2) - - - g2_r_pkn8[4:0] 1e5 nvalid_37 - g2_g_vrp0[5:0] 1e6 - - g2_g_vrp1[5:0] 1e7 setggamma (gc2) - - g2_g_vrp2[5:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.122- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1e8 - - g2_g_vrp3[5:0] 1e9 - - g2_g_vrp4[5:0] 1ea - - g2_g_vrp5[5:0] 1eb - g2_g_prp0[6:0] 1ec - g2_g_prp1[6:0] 1ed - - - g2_g_ pkp0[4:0] 1ee - - - g2_g_pkp1[4:0] 1ef - - - g2_g_pkp2[4:0] 1f0 - - - g2_g_pkp3[4:0] 1f1 - - - g2_g_pkp4[4:0] 1f2 - - - g2_g_pkp5[4:0] 1f3 - - - g2_g_pkp6[4:0] 1f4 - - - g2_g_pkp7[4:0] 1f5 - - - g2_g_pkp8[4:0] 1f6 - - g2_g_vrn0[5:0] 1f7 - - g2_g_vrn1[5:0] 1f8 - - g2_g_vrn2[5:0] 1f9 - - g2_g_vrn3[5:0] 1fa - - g2_g_vrn4[5:0] 1fb - - g2_g_vrn5[5:0] 1fc - g2_g_prn0[6:0] 1fd - g2_g_prn1[6:0] 1fe - - - g2_g_pkn0[4:0] 1ff - - - g2_g_pkn1[4:0] 200 - - - g2_g_pkn2[4:0] 201 - - - g2_g_pkn3[4:0] 202 - - - g2_g_pkn4[4:0] 203 - - - g2_g_pkn5[4:0] 204 - - - g2_g_pkn6[4:0] 205 - - - g2_g_pkn7[4:0] 206 - - - g2_g_pkn8[4:0] 207 nvalid_38 - g2_b_vrp0[5:0] 208 - - g2_b_vrp1[5:0] 209 - - g2_b_vrp2[5:0] 20a - - g2_b_vrp3[5:0] 20b - - g2_b_vrp4[5:0] 20c - - g2_b_vrp5[5:0] 20d - g2_b_prp0[6:0] 20e - g2_b_prp1[6:0] 20f - - - g2_b_ pkp0[4:0] 210 - - - g2_b_pkp1[4:0] 211 - - - g2_b_pkp2[4:0] 212 - - - g2_b_pkp3[4:0] 213 - - - g2_b_pkp4[4:0] 214 - - - g2_b_pkp5[4:0] 215 - - - g2_b_pkp6[4:0] 216 - - - g2_b_pkp7[4:0] 217 - - - g2_b_pkp8[4:0] 218 - - g2_b_vrn0[5:0] 219 - - g2_b_vrn1[5:0] 21a - - g2_b_vrn2[5:0] 21b - - g2_b_vrn3[5:0] 21c - - g2_b_vrn4[5:0] 21d - - g2_b_vrn5[5:0] 21e - g2_b_prn0[6:0] 21f - g2_b_prn1[6:0] 220 - - - g2_b_pkn0[4:0] 221 - - - g2_b_pkn1[4:0] 222 - - - g2_b_pkn2[4:0] 223 - - - g2_b_pkn3[4:0] 224 - - - g2_b_pkn4[4:0] 225 - - - g2_b_pkn5[4:0] 226 - - - g2_b_pkn6[4:0] 227 - - - g2_b_pkn7[4:0] 228 setbgamma (gc2) - - - g2_b_pkn8[4:0] 229 nvalid_39 - g3_r_vrp0[5:0] 22a - - g3_r_vrp1[5:0] 22b - - g3_r_vrp2[5:0] 22c - - g3_r_vrp3[5:0] 22d - - g3_r_vrp4[5:0] 22e - - g3_r_vrp5[5:0] 22f - g3_r_prp0[6:0] 230 - g3_r_prp1[6:0] 231 - - - g3_r_ pkp0[4:0] 232 setrgamma (gc3) - - - g3_r_pkp1[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.123- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 233 - - - g3_r_pkp2[4:0] 234 - - - g3_r_pkp3[4:0] 235 - - - g3_r_pkp4[4:0] 236 - - - g3_r_pkp5[4:0] 237 - - - g3_r_pkp6[4:0] 238 - - - g3_r_pkp7[4:0] 239 - - - g3_r_pkp8[4:0] 23a - - g3_r_vrn0[5:0] 23b - - g3_r_vrn1[5:0] 23c - - g3_r_vrn2[5:0] 23d - - g3_r_vrn3[5:0] 23e - - g3_r_vrn4[5:0] 23f - - g3_r_vrn5[5:0] 240 - g3_r_prn0[6:0] 241 - g3_r_prn1[6:0] 242 - - - g3_r_pkn0[4:0] 243 - - - g3_r_pkn1[4:0] 244 - - - g3_r_pkn2[4:0] 245 - - - g3_r_pkn3[4:0] 246 - - - g3_r_pkn4[4:0] 247 - - - g3_r_pkn5[4:0] 248 - - - g3_r_pkn6[4:0] 249 - - - g3_r_pkn7[4:0] 24a - - - g3_r_pkn8[4:0] 24b nvalid_40 - g3_g_vrp0[5:0] 24c - - g3_g_vrp1[5:0] 24d - - g3_g_vrp2[5:0] 24e - - g3_g_vrp3[5:0] 24f - - g3_g_vrp4[5:0] 250 - - g3_g_vrp5[5:0] 251 - g3_g_prp0[6:0] 252 - g3_g_prp1[6:0] 253 - - - g3_g_ pkp0[4:0] 254 - - - g3_g_pkp1[4:0] 255 - - - g3_g_pkp2[4:0] 256 - - - g3_g_pkp3[4:0] 257 - - - g3_g_pkp4[4:0] 258 - - - g3_g_pkp5[4:0] 259 - - - g3_g_pkp6[4:0] 25a - - - g3_g_pkp7[4:0] 25b - - - g3_g_pkp8[4:0] 25c - - g3_g_vrn0[5:0] 25d - - g3_g_vrn1[5:0] 25e - - g3_g_vrn2[5:0] 25f - - g3_g_vrn3[5:0] 260 - - g3_g_vrn4[5:0] 261 - - g3_g_vrn5[5:0] 262 - g3_g_prn0[6:0] 263 - g3_g_prn1[6:0] 264 - - - g3_g_pkn0[4:0] 265 - - - g3_g_pkn1[4:0] 266 - - - g3_g_pkn2[4:0] 267 - - - g3_g_pkn3[4:0] 268 - - - g3_g_pkn4[4:0] 269 - - - g3_g_pkn5[4:0] 26a - - - g3_g_pkn6[4:0] 26b - - - g3_g_pkn7[4:0] 26c setggamma (gc3) - - - g3_g_pkn8[4:0] 26d nvalid_41 - g3_b_vrp0[5:0] 26e - - g3_b_vrp1[5:0] 26f - - g3_b_vrp2[5:0] 270 - - g3_b_vrp3[5:0] 271 - - g3_b_vrp4[5:0] 272 - - g3_b_vrp5[5:0] 273 - g3_b_prp0[6:0] 274 - g3_b_prp1[6:0] 275 - - - g3_b_ pkp0[4:0] 276 - - - g3_b_pkp1[4:0] 277 - - - g3_b_pkp2[4:0] 278 - - - g3_b_pkp3[4:0] 279 - - - g3_b_pkp4[4:0] 27a - - - g3_b_pkp5[4:0] 27b - - - g3_b_pkp6[4:0] 27c - - - g3_b_pkp7[4:0] 27d setbgamma (gc3) - - - g3_b_pkp8[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.124- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 27e - - g3_b_vrn0[5:0] 27f - - g3_b_vrn1[5:0] 280 - - g3_b_vrn2[5:0] 281 - - g3_b_vrn3[5:0] 282 - - g3_b_vrn4[5:0] 283 - - g3_b_vrn5[5:0] 284 - g3_b_prn0[6:0] 285 - g3_b_prn1[6:0] 286 - - - g3_b_pkn0[4:0] 287 - - - g3_b_pkn1[4:0] 288 - - - g3_b_pkn2[4:0] 289 - - - g3_b_pkn3[4:0] 28a - - - g3_b_pkn4[4:0] 28b - - - g3_b_pkn5[4:0] 28c - - - g3_b_pkn6[4:0] 28d - - - g3_b_pkn7[4:0] 28e - - - g3_b_pkn8[4:0] 2a7 setdismo nvalid_45 0 - - rm - dm[1:0] note 1: the default value of otp memory bits are all 1. note 2: valid_xxx bit decide the opt reload enable/disable, th e default value is 1. if the own otp area of valid_xxx bit had been programmed, the valid_xxx bit will be changed to 0 automatically and execute th e otp reload. note 3: there are some conditions that HX8392-A can reload otp. a. hardware reset b. software reset c. slpout command. table 5.52: otp table ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.125- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.17.2 otp programming flow figure 5.41: otp programming sequence otp_key0[7:0] otp_key1[7:0] description note otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h enter otp program mode otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h leave otp program mode other value invalid 1. if HX8392-A operate on otp program mode, then keep on otp program mode. 2. if HX8392-A operate on non-otp program mode, then keep on non-otp program mode. note:1. when do the otp programming process, it must be added 5ms delay time and block program area need 20ms delay time after setting otp_prog=1 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.126- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.17.3 programming sequence step operation 1 power on and reset the module. 2 slpout and set 0xb9h = 0xffh, 0x83h, 0x92h to acc ess the extension commands. 3 write optimized values to related registers. 4 set vgh power to 7.5v for otp programming state for using internal power mode. or using the external power 7.5v to vpp. 5 wait 100ms for vpp power stable. 6 set otp_key1[7:0] (re9h)=0xaah and otp_key1[7:0] (re9h)=0x55h to enter otp program mode. 7 specify otp_index, please refer to the otp table. 8 set otp_mask=0x00h, programming the entire bit of one parameter. 9 set otp_prog=1, internal register begin write to otp according to otp_index. 10 wait 5 ms ( note 1,4 ) 11 complete programming one parameter to otp. if conti nue to programming other parameter, return to step (7). otherwise, set otp_key1[7:0] (re9h)=0x00h and otp_key1[7:0] (re9h)=0x00h to leave otp program mode. 12 remove the external power on vpp pin. 13 wait 5us note 1: when do the otp programming process, it must be add ed 5ms delay time and block program area need 20ms delay time after setting otp_prog=1 note 2: when do the otp program onvcmc setting (setvcmc_1: 7dh, setvcmc_2: 7fh, setvcmc_3: 81h), user just specify the 7ch, the all settings of ddb will b e programmed to setvcmc_1, setvcmc_2 and setvcmc_3 automatically. note 3: when do the otp program on id1~3 setting (setid_1: 83 h~85h, setid_2: 87h~89h, setid_3: 8bh~8dh), user just specify the 82h, the all settings of id1~3 wil l be programmed to setid_1, setid_2 and setid_3 automatically. note 4: some otp can block program, user just specify the ot p_index, the all settings of specially block will be programmed automatically. the block program area ne ed 20ms delay tim ref. command otp_index of program otp area of block program delay time setcabcgain_ui 51h 51h~5ah 20ms setcabcgain_st 5bh 5bh~64h 20ms setcabcgain_mv 65h 65h~6eh 20ms setrgamma(gc0) f7h f7h~118h 20ms setggamma(gc0) 119h 119h~13ah 20ms setbgamma(gc0) 13bh 13bh~15ch 20ms setrgamma(gc1) 15dh 15dh~17eh 20ms setggamma(gc1) 17fh 17fh~1a0h 20ms setbgamma(gc1) 1a1h 1a1h~1c2h 20ms setrgamma(gc2) 1c3h 1c3h~1e4h 20ms setggamma(gc2) 1e5h 1e5h~206h 20ms setbgamma(gc2) 207h 207h~228h 20ms setrgamma(gc3) 229h 229h~24ah 20ms setggamma(gc3) 24bh 24bh~26ch 20ms setbgamma(gc3) 26dh 26dh~28eh 20ms table 5.53: otp programming sequence ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.127- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 5.17.4 otp programming example of vcom setting vcmc write optimized vcom value of register set cmd 0xb6h 1st parameter 0x##h(vcmc) set otp_prog=1 for programming action set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x7ch 4th parameter 0x01h delay delay delay delay 5 55 5ms msms ms set extension commands set cmd 0xb9h 1st parameter 0xffh 2nd parameter 0x83h 3rd parameter 0x92h otp program flow end using external power 7.5v to vpp and delay 100ms set otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h set cmd 0xe9h 1st parameter 0xaah 2nd parameter0x55h reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod h/w reset + slpout otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h set cmd 0xe9h 1st parameter 0x00h 2nd parameter0x00h set otp index 0x7ch for vcmc_1[7:0] set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x7ch 4th parameter 0x00h set otp_mask set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x7ch 4th parameter 0x00h remove vpp power and delay remove vpp power and delay remove vpp power and delay remove vpp power and delay 5 55 5us usus us figure 5.42: otp programming sequence example 1 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.128- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.17.5 otp programming example of id1, id2 and id3 set id1, id2 and id3 values set cmd 0xc3h 1st parameter 0x##h (id1) 2nd parameter0x##h (id2) 2nd parameter0x##h (id3) set otp_prog=1 for programming action set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x82h 4th parameter 0x01h delay delay delay delay 5 55 5ms msms ms set extension commands set cmd 0xb9h 1st parameter 0xffh 2nd parameter 0x83h 3rd parameter 0x92h otp program flow end using external power 7.5v to vpp and delay 100ms set otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h set cmd 0xe9h 1st parameter 0xaah 2nd parameter0x55h reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod h/w reset + slpout (command 0x11h) otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h set cmd 0xe9h 1st parameter 0x00h 2nd parameter0x00h set otp index 0x82h for id1[7:0], id2[6:0] and id3[7:0] set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x82h 4th parameter 0x00h set otp_mask set cmd 0xbbh 1st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x82h 4th parameter 0x00h remove vpp power and delay remove vpp power and delay remove vpp power and delay remove vpp power and delay 5 55 5us usus us figure 5.43: otp programming sequence example 2 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.129- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 5.17.6 otp read example of 0x7dh (vcmc_1) figure 5.44: otp read sequence flow of index 0x7dh ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.130- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6. command 6.1 command list 6.1.1 standard command (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) video mode 00 nop 0 1 0 0 0 0 0 0 0 0 no operation - yes 01 swreset 0 1 0 0 0 0 0 0 0 1 software reset - yes 0 1 0 0 0 0 0 1 0 0 read display identification information - yes 1 1 id1[7:0] - - - 1 1 id2[7:0] - - - 04 rddidif 1 1 id3[7:0] - - - 0 1 0 0 0 0 0 1 0 1 read number of dsi parity error - - 05 rdnumpe 1 1 p[7:0] - - - 0 1 0 0 0 0 1 0 0 1 read display status - yes 1 1 d[31:24] - - - 1 1 d[23:16] - - - 1 1 d[15:8] - - - 09 rddst 1 1 d[7:0] - - - 0 1 0 0 0 0 1 0 1 0 read display power mode - yes 1 1 x x x x x x x x dummy read - - 0a rddpm 1 1 d7 d6 d5 d4 d3 d2 0 0 - - - 0 1 0 0 0 0 1 0 1 1 read display madctl - yes 0b rddmadctl 1 1 d7 d6 d5 d4 d3 d2 d1 d0 - - - 0 1 0 0 0 0 1 1 0 0 read display pixel format - yes 0c rddcolmod 1 1 - d6 d5 d4 - d2 d1 d0 - - - 0 1 0 0 0 0 1 1 0 1 read display image mode - yes 0d rddim 1 1 d7 d6 d5 d4 d3 d2 d1 d0 - - - 0 1 0 0 0 0 1 1 1 0 read display signal mode - yes 0e rddsm 1 1 d7 d6 d5 d4 d3 d2 d1 d0 - - - 0 1 0 0 0 0 1 1 1 1 read display self-diagnostic result - yes 0f rddsdr 1 1 d7 d6 d5 d4 0 0 0 0 - - - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.131- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) video mode 10 slpin 0 1 0 0 0 1 0 0 0 0 sleep in - yes 11 slpout 0 1 0 0 0 1 0 0 0 1 sleep out - yes 12 ptlon 0 1 0 0 0 1 0 0 1 0 partial mode on - no 13 noron 0 1 0 0 0 1 0 0 1 1 normal display mode on - no 20 invoff 0 1 0 0 1 0 0 0 0 0 display inversion off - yes 21 invon 0 1 0 0 1 0 0 0 0 1 display inversion on - yes 22 allpoff 0 1 0 0 1 0 0 0 1 0 all pixel off - yes 23 allpon 0 1 0 0 1 0 0 0 1 1 all pixel on - yes 0 1 0 0 1 0 0 1 1 0 gamma set - yes 26 gamset 1 1 gc7 gc6 gc5 gc4 gc3 gc2 gc1 gc0 - - 28 dispoff 0 1 0 0 1 0 1 0 0 0 display off - yes 29 dispon 0 1 0 0 1 0 1 0 0 1 display on - yes 0 1 0 0 1 0 1 0 1 0 column address set - no 1 1 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 column address start - - 1 1 sc7 sc6 sc5 sc4 sc3 sc2 sc1 sc0 column address start - - 1 1 ec15 ec14 ec13 ec12 ec11 ec10 ec9 ec8 column address end - - 2a caset 1 1 ec7 ec6 ec5 ec4 ec3 ec2 ec1 ec0 column address end - - 0 1 0 0 1 0 1 0 1 1 row address set - no 1 1 sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 row address start - - 1 1 sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 row address start - - 1 1 ep15 ep14 ep13 ep12 ep11 ep10 ep9 ep8 row address end - - 2b paset 1 1 ep7 ep6 ep5 ep4 ep3 ep2 ep1 ep0 row address end - - 0 1 0 0 1 0 1 1 0 0 memory write - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 write data 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 write data - 2c ramwr 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 write data - 0 1 0 0 1 0 1 1 1 0 memory read - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 read data - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 read data - - 2e ramrd 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 0 1 1 0 0 0 0 partial area - no 1 1 sr15 sr14 sr13 sr12 sr11 sr10 sr9 sr8 start row - - 1 1 sr7 sr6 sr5 sr4 sr3 sr2 sr1 sr0 start row - - 1 1 er15 er14 er13 er12 er11 er10 er9 er8 end row - - 30 pltar 1 1 er7 er6 er5 er4 er3 er2 er1 er0 end row - - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.132- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) video mode 0 1 0 0 1 1 0 0 1 1 vertical scrolling definition - no 1 1 tfa[15:8] - - - 1 1 tfa[7:0] - - - 1 1 vsa[15:8] - - - 1 1 vsa[7:0] - - - 1 1 bfa[15:8] - - - 33 vscrdef 1 1 bfa[7:0] - - - 34 teoff 0 1 0 0 1 1 0 1 0 0 tearing effect line off - yes 0 1 0 0 1 1 0 1 0 1 tearing effect line on - yes 35 teon 1 1 x x x x x x x m - - - 0 1 0 0 1 1 0 1 1 0 memory access control - yes 36 madctl 1 1 b7 b6 b5 b4 b3 b2 x x - - - 0 1 0 0 1 1 0 1 1 1 vertical scrolling start address - no 1 1 vsp[15:8] - - - 37 vscrsadd 1 1 vsp[7:0] - - - 38 idmoff 0 1 0 0 1 1 1 0 0 0 idle mode off - yes 39 idmon 0 1 0 0 1 1 1 0 0 1 idle mode on - yes 0 1 0 0 1 1 1 0 1 0 - - yes 3a colmod 1 1 x d6 d5 d4 x d2 d1 d0 - - - 0 1 0 0 1 1 1 1 0 0 memory write - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 - - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 - - - 3c ramwrcon 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 0 1 1 1 1 1 0 memory read - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 - - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 - - - 3e ramrdcon 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 1 0 0 0 1 0 0 tesl - yes 1 1 teline[15:8](8b0) - - - 44 tesl 1 1 teline[7:0](8b0) - - - 0 1 0 1 0 0 0 1 0 1 reture the current scanline sln[15:0] - yes 1 1 sln[15:8] - - - 45 getscan 1 1 sln[7:0] - - - 0 1 0 1 0 1 0 0 0 1 write display brightness - yes 51 wrdisbv 1 1 dbv[7:0] - - - 0 1 0 1 0 1 0 0 1 0 read display brightness value - yes 52 rddisbv 1 1 dbv[7:0] - - - 0 1 0 1 0 1 0 0 1 1 - yes 53 wrctrld 1 1 xx xx bctrl xx dd bl xx xx write ctrl display - - 0 1 0 1 0 1 0 0 1 1 read control value display - yes 54 rdctrld 1 1 0 0 bctrl 0 dd bl 0 0 - - - 0 1 0 1 0 1 0 1 0 1 write adaptive brightness control - yes 55 wrcabc 1 1 xx xx xx xx xx xx c1 c0 - - - 0 1 0 1 0 1 0 1 1 0 read adaptive brightness control content - yes 56 rdcabc 1 1 0 0 0 0 0 0 c1 c0 - - - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.133- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) video mode 0 1 0 1 0 1 1 1 1 0 write cabc minimum brightness - yes 5e wrcabcmb 1 1 cmb[7:0] - - - 0 1 0 1 0 1 1 1 1 1 read cabc minimum brightness - yes 5f rdcabcmb 1 1 cmb[7:0] - - - 0 1 0 1 1 0 1 0 0 0 read automatic brightness control self-diagnostic result - yes 1 1 xx xx xx xx xx xx xx xx - - - 68 rdabcsdr 1 1 d[7:6] 0 0 0 0 0 0 - - - 0 1 1 1 0 1 1 0 1 0 read id1 - yes da rdid1 1 1 modules manufacturer[7:0] - - - 0 1 1 1 0 1 1 0 1 1 read id2 - yes db rdid2 1 1 lcd module/driver version [7:0] - - - 0 1 1 1 0 1 1 1 0 0 read id3 - yes dc rdid3 1 1 lcd module/driver id[7:0] - - - 0 1 1 0 1 0 0 0 0 1 read the ddb from the provided location. - yes 1 1 x x x x x x x x - - - 1 1 x x x x x x x x - - - a1 read_ddb_start 1 1 x x x x x x x x - - - 0 1 1 0 1 0 1 0 0 0 continue reading the ddb from the last read location. - yes 1 1 x x x x x x x x - - - 1 1 x x x x x x x x - - - a8 read_ddb_continue 1 1 x x x x x x x x - - - note: (1) undefined commands are treated as nop (00 .h. ) command. (2) b0 .h. to d9 .h. and de .h. to ff .h. are for factory use of display supplier. customer can decide if these commands are available or they are treated as nop (0 0 .h. ) commands before shipping to customer. default value is nop (00 .h. ). ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.134- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.1.2 user define command list table user define command list is available only set set exc command. operation default hex code dc x rd x wrx d7 d6 d5 d4 d3 d2 d1 d0 function (hex) 0 1 1 0 1 1 0 0 0 0 set internal oscillator - 1 1 - - - - - - - osc_en - (00h) b0 setosc 1 1 - - - - uadj[3:0] - (07h) 0 1 1 0 1 1 0 0 0 1 set power related setting - 1 1 - vsn_en vsp_en vgl_en vgh_en vcl_en vdddn_hz stb - (01h) 1 1 - - - - - - - dstb - (00h) 1 1 - fs1[2:0] - ap[2:0] - (44h) 1 1 vghs[3:0] vgls[3:0] - (77h) 1 1 dt[1:0] - - - - - - - (01h) 1 1 - - - btp[4:0] - (11h) 1 1 - - - btn[4:0] - (11h) 1 1 vrhp[7:0] - (36h) 1 1 vrhn[7:0] - (30h) 1 1 - - vrmp[5:0] - (2bh) 1 1 - - vrmn[5:0] - (24h) 1 1 - apf_en dd_tu vpnl_en - - pccs[1:0] - (42h) b1 setpower 1 1 - dc86_div[3:0] xdk1 xdk0 auto_xdk - (72h) 0 1 1 0 1 1 0 0 1 0 set display related register - 1 1 - - - - gon dte d[1:0] - (08h) 1 1 nl[7:0] - (c8h) 1 1 bp[7:0] - (00h) 1 1 fp[7:0] - (00h) 1 1 rtn[7:0] - (0 5 h) 1 1 sap[3:0] init_disp init_set[2:0] - (a1h) 1 1 gen_on[7:0] - (00h) 1 1 gen_off[7:0] - (ffh) 1 1 bp_pe [7:0] - (00h) 1 1 fp_pe [7:0] - (00h) 1 1 rtn_pe[7:0] - (05h) b2 setdisp 1 1 - res_sel[2:0] - - tgs[1:0] (20h) 0 1 1 0 1 1 0 0 1 1 set rgb interface related register) - b3 setrgbif 1 1 - - - - dpl hspl vspl epl (01h) 0 1 1 0 1 0 0 1 0 0 set display waveform cycles - 1 1 - - nw_pe[2:0] nw[2:0] - (12h) 1 1 - - - - shr[11:8] (00h) 1 1 shr[7:0] (01h) 1 1 spon[7:0] - (06h) 1 1 spoff[7:0] - (85h) 1 1 chr[7:0] - (01h) 1 1 con[7:0] - (0ch) 1 1 coff[7:0] - (82h) 1 1 shp[3:0] - - - - (00h) 1 1 cph[3:0] ccp[3:0] (01h) 1 1 n_t1[7:0] (00h) 1 1 n_t2[7:0] (0ch) 1 1 n_t3[7:0] (04h) 1 1 n_t4[7:0] (04h) 1 1 n_t5[7:0] (08h) 1 1 n_t6[7:0] (1eh) 1 1 n_t7[7:0] (09h) 1 1 n_t8[7:0] (0ch) b4 setcyc 1 1 n_t9[7:0] (0ch) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.135- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1 1 - - - - eqt[3:0] (01h) 0 1 1 0 1 1 0 1 1 0 set vcom voltage - b6 setvcom (otpx3) 1 1 vcmc[7:0] (5eh) 0 1 1 0 1 1 0 1 1 1 set te function - 1 1 - - - - tei[3:0] (00h) 1 1 - - - - - tep[10:8] (00h) b7 sette 1 1 tep[7:0] (00h) 0 1 1 0 1 1 1 0 0 1 set extended command set - 1 1 extc1[7:0] - (00h/ffh) 1 1 extc2[7:0] - (00h/83h) b9 setextc 1 1 extc3[7:0] - (00h/92h) 0 1 1 1 0 0 1 0 0 1 set mipi control - 1 1 0 0 0 tx_osc 0 0 lan_num[1:0] - (01h) ba setmipi 1 1 1 0 0 0 0 0 tx_delay[1:0] (82h) 0 1 1 0 1 1 1 0 1 1 set otp - 1 1 otp_mask[7:0] - (00h) 1 1 - - - - - - otp_index[9:8] - (00h) 1 1 otp_index[7:0] - (3bh) 1 1 otp_load_ disable otp_test otp_por otp_pwe otp_ptm[1:0] otp_pwr_ sel otp_prog - (00h) bb setotp 1 1 otp_data[7:0] otp read / write (xxh) 0 1 1 1 0 0 0 0 1 0 set ptba mode 1 1 0 0 0 0 0 1 0 1 (05h) 1 1 ptba[23:16] (60h) 1 1 ptba[15:8] (04h) bf setptba 1 1 ptba[7:0] (00h) 0 1 1 1 0 0 0 0 1 0 set display mode c2 setdismo 1 1 - - - - rm - dm[1:0] (00h) 0 1 1 1 0 0 0 0 1 1 set id - 1 1 id1[7:0] - (00h) 1 1 id2[7:0] - (00h) c3 setid (otpx3) 1 1 id3[7:0] - (00h) 0 1 1 1 0 0 0 1 0 0 set ddb - 1 1 ddb1[7:0] - (00h) 1 1 ddb2[7:0] - (00h) 1 1 ddb3[7:0] - (00h) c4 setddb 1 1 ddb4[7:0] - (00h) 0 1 1 1 0 0 1 0 0 1 set cabc control - 1 1 - sel_pwmclk[2:0] sel_gain[1:0] invpuls (1) sel_blduty (1) (2fh) 1 1 pwm_period[7:0] - (2bh) 1 1 cabc_fsyn c dim_frame[6:0] (1eh) 1 1 cabc_step[7:0] (1eh) 1 1 cabc_clken[7:0] (00h) 1 1 cabc_dd savepower[6:0] (00h) 1 1 mean_offset[7:0] - (00h) 1 1 - - - - cabc_flm[3:0] - (01h) c9 setcabc 1 1 - - en_dim_mix en_cost_m ean en_cost en_nln_gai n en_judge en_temp - (3eh) 0 1 1 1 0 0 1 0 1 0 set cabc related registe - 1 1 0 dbg0[6:0] - (40h) 1 1 0 dbg1[6:0] - (3ch) 1 1 0 dbg2[6:0] - (38h) 1 1 0 dbg3[6:0] - (34h) 1 1 0 dbg4[6:0] - (33h) 1 1 0 dbg5[6:0] - (32h) 1 1 0 dbg6[6:0] - (2bh) ca setcabcgai n 1 1 0 dbg7[6:0] - (24h) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.136- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1 1 0 dbg8[6:0] - (22h) 0 1 1 1 0 1 1 1 0 0 set panel related register cc setpanel 1 1 - - - - ss_panel gs_panel rev_pane bgr_panel - (02h) 0 1 1 1 0 1 0 1 0 0 set eq function d4 setgipeq 1 1 0 0 0 0 eq_gr eg_gf 0 0 - ( 0c h) 0 1 1 1 0 1 0 1 0 1 set gck eq function 1 1 0 0 0 0 0 0 0 0 (00h) 1 1 0 0 0 0 0 0 0 0 (00h) d5 setgckeq 1 1 eq_delay[7:0] (08h) 0 1 1 1 0 1 1 0 0 0 set rgb/video cycle 1 1 - - nw_pe[2:0] nw[2:0] - (12h) 1 1 - - - - shr[11:8] - (00h) 1 1 shr[7:0] - (03h) 1 1 spon[7:0] - (06h) 1 1 spoff[7:0] - (85h) 1 1 chr[7:0] - (0 3 h) 1 1 con[7:0] - (0ch) 1 1 coff[7:0] - (82h) 1 1 shp[3:0] - - - - - (00h) 1 1 cph[3:0] ccp[3:0] - (01h) 1 1 n_t1[7:0] - (00h) 1 1 n_t2[7:0] - (0ch) 1 1 n_t3[7:0] - (04h) 1 1 n_t4[7:0] - (04h) 1 1 n_t5[7:0] - (08h) 1 1 n_t6[7:0] - (1eh) 1 1 n_t7[7:0] - (09h) 1 1 n_t8[7:0] - (0ch) 1 1 n_t9[7:0] - (0ch) d8 setrgbcyc 1 1 - - - - eqt[3:0] - (01h) 0 1 1 1 1 0 0 0 0 0 set red gamma curve related setting 1 1 - - r_vrp0[5:0] - (04h) 1 1 - - r_vrp1[5:0] - (0ch) 1 1 - - r_vrp2[5:0] - (0dh) 1 1 - - r_vrp3[5:0] - (0ah) 1 1 - - r_vrp4[5:0] - (15h) 1 1 - - r_vrp5[5:0] - (21h) 1 1 - r_prp0[6:0] - (0dh) 1 1 - r_prp1[6:0] - (19h) 1 1 - r_pkp0[4:0] - (06h) 1 1 - - - r_pkp1[4:0] - (0ch) 1 1 - - - r_pkp2[4:0] - (0fh) 1 1 - - - r_pkp3[4:0] - (13h) 1 1 - - - r_pkp4[4:0] - (16h) 1 1 - - - r_pkp5[4:0] - (14h) 1 1 - - - r_pkp6[4:0] - (15h) 1 1 - - - r_pkp7[4:0] - (0dh) 1 1 - - - r_pkp8[4:0] - (13h) 1 1 - - r_vrn0[5:0] - (04h) 1 1 - - r_vrn1[5:0] - (0ch) 1 1 - - r_vrn2[5:0] - (0dh) 1 1 - - r_vrn3[5:0] - (0ah) 1 1 - - r_vrn4[5:0] - (15h) 1 1 - - r_vrn5[5:0] - (21h) 1 1 - r_prn0[6:0] - (0dh) 1 1 - r_prn1[6:0] - (19h) 1 1 - - - r_pkn0[4:0] - (06h) 1 1 - - - r_pkn1[4:0] - (0ch) e0 setr gamma 1 1 - - - r_pkn2[4:0] - (0fh) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.137- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1 1 - - - r_pkn3[4:0] - (13h) 1 1 - - - r_pkn4[4:0] - (16h) 1 1 - - - r_pkn5[4:0] - (14h) 1 1 - - - r_pkn6[4:0] - (15h) 1 1 - - - r_pkn7[4:0] - (0dh) 1 1 - - - r_pkn8[4:0] - (13h) 0 1 1 1 1 0 0 0 0 1 set green gamma curve related setting - 1 1 - - g_vrp0[5:0] - (04h) 1 1 - - g_vrp1[5:0] - (0ch) 1 1 - - g_vrp2[5:0] - (0dh) 1 1 - - g_vrp3[5:0] - (0ah) 1 1 - - g_vrp4[5:0] - (15h) 1 1 - - g_vrp5[5:0] - (21h) 1 1 - g_prp0[6:0] - (0dh) 1 1 - g_prp1[6:0] - (19h) 1 1 - - - g_pkp0[4:0] - (06h) 1 1 - - - g_pkp1[4:0] - (0ch) 1 1 - - - g_pkp2[4:0] - (0fh) 1 1 - - - g_pkp3[4:0] - (13h) 1 1 - - - g_pkp4[4:0] - (16h) 1 1 - - - g_pkp5[4:0] - (14h) 1 1 - - - g_pkp6[4:0] - (15h) 1 1 - - - g_pkp7[4:0] - (0dh) 1 1 - - - g_pkp8[4:0] - (13h) 1 1 - - g_vrn0[5:0] - (04h) 1 1 - - g_vrn1[5:0] - (0ch) 1 1 - - g_vrn2[5:0] - (0dh) 1 1 - - g_vrn3[5:0] - (0ah) 1 1 - - g_vrn4[5:0] - (15h) 1 1 - - g_vrn5[5:0] - (21h) 1 1 - g_prn0[6:0] - (0dh) 1 1 - g_prn1[6:0] - (19h) 1 1 - - - g_pkn0[4:0] - (06h) 1 1 - - - g_pkn1[4:0] - (0ch) 1 1 - - - g_pkn2[4:0] - (0fh) 1 1 - - - g_pkn3[4:0] - (13h) 1 1 - - - g_pkn4[4:0] - (16h) 1 1 - - - g_pkn5[4:0] - (14h) 1 1 - - - g_pkn6[4:0] - (15h) 1 1 - - - g_pkn7[4:0] - (0dh) e1 setg gamma 1 1 - - - g_pkn8[4:0] - (13h) 0 1 1 1 1 0 0 0 1 0 set blue gamma curve related setting - 1 1 - - b_vrp0[5:0] - (04h) 1 1 - - b_vrp1[5:0] - (0ch) 1 1 - - b_vrp2[5:0] - (0dh) 1 1 - - b_vrp3[5:0] - (0ah) 1 1 - - b_vrp4[5:0] - (15h) 1 1 - - b_vrp5[5:0] - (21h) 1 1 - b_prp0[6:0] - (0dh) 1 1 - b_prp1[6:0] - (19h) 1 1 - - - b_pkp0[4:0] - (06h) 1 1 - - - b_pkp1[4:0] - (0ch) 1 1 - - - b_pkp2[4:0] - (0fh) 1 1 - - - b_pkp3[4:0] - (13h) 1 1 - - - b_pkp4[4:0] - (16h) 1 1 - - - b_pkp5[4:0] - (14h) 1 1 - - - b_pkp6[4:0] - (15h) 1 1 - - - b_pkp7[4:0] - (0dh) 1 1 - - - b_pkp8[4:0] - (13h) 1 1 - - b_vrn0[5:0] - (04h) 1 1 - - b_vrn1[5:0] - (0ch) e2 setb gamma 1 1 - - b_vrn2[5:0] - (0dh) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.138- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1 1 - - b_vrn3[5:0] - (0ah) 1 1 - - b_vrn4[5:0] - (15h) 1 1 - - b_vrn5[5:0] - (21h) 1 1 - b_prn0[6:0] - (0dh) 1 1 - b_prn1[6:0] - (19h) 1 1 - - - b_pkn0[4:0] - (06h) 1 1 - - - b_pkn1[4:0] - (0ch) 1 1 - - - b_pkn2[4:0] - (0fh) 1 1 - - - b_pkn3[4:0] - (13h) 1 1 - - - b_pkn4[4:0] - (16h) 1 1 - - - b_pkn5[4:0] - (14h) 1 1 - - - b_pkn6[4:0] - (15h) 1 1 - - - b_pkn7[4:0] - (0dh) 1 1 - - - b_pkn8[4:0] - (13h) 0 1 1 1 1 0 0 0 1 1 set color enhancem ent mode e3 setchemod e 1 1 - - se_mode[1:0] be_mode[1:0] ce_mode[1:0] (00h) 0 1 1 1 1 0 1 0 0 1 - 1 1 otp_key0[7:0] - (00/aah) e9 setotpkey 1 1 otp_key1[7:0] - (00/55h) 0 1 1 1 1 1 0 1 0 0 get h imax id code f4 gethxid 1 1 himax id[7:0] - (92h) 0 1 1 1 1 1 0 1 1 1 get db[7:0] status f7 getdb 1 1 db[7:0] - - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.139- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2 command description 6.2.1 nop (00h) nop (no operation) 00h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 0 0 0 00 parameter no parameter description this command is an empty command; it does not have any effect on the display module. however it can be used to terminate frame memory wr ite or read as described in ramwr (memory write) and ramrd (memory read) commands. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.140- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.2 software reset (01h) swreset (software reset) 01h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 1 0 0 0 0 0 0 0 1 01 parameter no parameter description when the software reset command is written, it caus es a software reset. it resets the commands and parameters to their s/w reset default values. (see default tables in each command description.) note: the frame memory conten ts are unaffected by this command it will be necessary to wait 5msec before sending n ew command following software reset. restriction the display module loads all display suppliers fac tory default values to the registers during this 5msec. if software reset is applied during sle ep out mode, it will be necessary to wait 120msec before sending sleep out command. software reset command cannot be sent during sleep out sequence. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart swreset display whole blank screen set commands to s/w default value sleep in mode legend parameter displa y action mode sequential transfer ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.141- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.3 read display identification information (04h ) rddidif (read display identification information) 04h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 1 0 0 04 1 st parameter 1 1 - id1[7:0] xx 2 nd parameter 1 1 - id2[7:0] xx 3 rd parameter 1 1 - id3[7:0] xx description this read byte returns 24-bit display identificatio n information. the 1 st parameter identifies the lcd modules manufacturer. it is specified by display supplier a nd for xx is defined as xxhex. the 2 nd parameter has 2 purposes. bit7 (msb) defines the type of panel. 0=driv er (stn b/w), 1=module (colour). bits 6..0 are used to track the lcd module/driver version. it is defined by display supplier and it changes each time a revi sion is made to the display, material or construction specificat ions. see table: id byte value v[7:0] version changes 80h -- -- 81h -- -- 82h -- -- 83h -- -- 84h -- -- 85h -- -- the 3 rd parameter identifies the lcd module/driver. it is specified by display supplier and for this lcd proj ect module is defined as xxhex. restriction register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence otp value s/w reset otp value flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.142- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.4 rdnumpe: read number of the parity errors (05 h) rdnumpe (read number of the parity errors) 05h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 1 0 1 05 1 st parameter 1 1 - p7 p6 p5 p4 p3 p2 p1 p0 xx description the first parameter is telling a number of the erro rs on dsi. the more detailed description of the bits is below. p[6..0] bits are telling a number of the errors. p[7] is set to 1 if there is overflow with p[6..0] bits. p[7..0] bits are set to 0s (as well as rddsm(0eh)s d0 is set 0 at the same time) after there is sent the parameter information (= the read function is compl eted). restriction setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default p[7:0] = 0x00h flow chart serial i/f mode host host host host driver driver driver driver legend command parameter display action mode sequential transfer (r05h) rdnumpe send 1st parameter rddsm (r0eh) 's d0 = '0' p[7:0] = "00"h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.143- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.5 read display status (09h) rddst (read display status) 09h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 0 1 09 1 st parameter 1 1 - d[31:24] xx 2 nd parameter 1 1 - d[23:16] xx 3 rd parameter 1 1 - d[15:8] xx 4 th parameter 1 1 - d[7:0] xx description this command indicates the current status of the di splay as described in the table below: bit description comment d31 booster voltage status d30 page address order d29 column address order d28 page/column order d27 display device line refresh order d26 rgb/bgr order d25 display data latch data order d24 source san sequence d23 gate san sequence d22 d21 d20 interface colour pixel format definition d19 idle mode on/off d18 partial mode on/off d17 sleep in/out d16 display normal mode on/off d15 vertical scrolling status d14 horizontal scrolling status set to 0 d13 inversion status d12 all pixels on d11 all pixels off d10 display on/off d9 tearing effect line on/off d8 d7 d6 gamma curve selection d5 tearing effect output line mode d4 horizontal sync. (hsync, dpi i/f) d3 vertical sync. (vsync, dpi i/f) d2 pixel clock (dck, dpi i/f) d1 data enable (enable, dpi i/f) d0 parity error on dsi bit values are explained overleaf. ? bit d31 C booster voltage status 0 = booster off. 1 = booster on. bit d30 C page address order 0 = top to bottom (when madctl b7=0). 1 = bottom to top (when madctl b7=1). bit d29 C column address order 0 = left to right (when madctl b6=0). 1 = right to left (when madctl b6=1). bit d28 C page/column order 0 = normal (when madctl b5=0). 1 = rotation (when madctl b5=1). bit d27 C line address order 0 = lcd refresh top to bottom (when madctl b4=0). 1 = lcd refresh bottom to top (when madctl b4=1). bit d26 C rgb/bgr order 0 = rgb (when madctl b3=0). ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.144- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 bit d25 C display data latch data order 0 = lcd refresh left to right (when madctl b2=0). 1 = lcd refresh right to left (when madctl b2=1). bit d24 C source san sequence 0 = source output left to right (when madctl b1=0 ). 1 = source output right to left (when madctl b1=1 ). bit d23 C gate san sequence 0 = gate output top to bottom (when madctl b0=0). 1 = gate output bottom to top (when madctl b0=1). bits d22, d21, d20 C interface colour pixel format d efinition interface format d22 d21 d20 not defined 0 0 0 not defined 0 0 1 not defined 0 1 0 not defined 0 1 1 not defined 1 0 0 16 bit/pixel 1 0 1 18 bit/pixel 1 1 0 24 bit/pixel 1 1 1 bit d19 C idle mode on/off 0 = idle mode off. 1 = idle mode on. bit d18 C partial mode on/off 0 = partial mode off. 1 = partial mode on. bit d17 C sleep in/out 0 = sleep in mode. 1 = sleep out mode. bit d16 C display normal mode on/off 0 = partial or scrolling mode. 1 = normal mode. bit d15 C vertical scrolling on/off 0 = vertical scrolling is off. 1 = vertical scrolling is on. bit d14 C horizontal scrolling status this bit is not applicable for this project, so it is set to 0 bit d13 C inversion on/off 0 = inversion is off. 1 = inversion is on. ? bit d12 C all pixels on. 0 = nornal mode. 1 = all pixels on. bit d11 C all pixels off. 0 = nornal mode. 1 = all pixels off. bit d10 C display on/off 0 = display is off. 1 = display is on. bit d9 C tearing effect line on/off 0 =tearing effect line off. 1 = tearing effect on. bits d8, d7, d6 C gamma curve selection gamma curve selected b8 b7 b6 gamma set (26h) parameter gamma curve 1 0 0 0 reserved gamma curve 2 0 0 1 reserved gamma curve 3 0 1 0 reserved gamma curve 4 0 1 1 reserved not defined 1 0 0 not defined not defined 1 0 1 not defined not defined 1 1 0 not defined not defined 1 1 1 not defined bit d5 C tearing effect line output mode. 0 = mode 1, v-blanking only. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.145- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 bit d4 C horizontal sync. (dpi i/f) on/off,note 1. 0 = horizontal sync. line is off (low). 1 = horizontal sync. line is on (high). bit d3 C vertical sync. (dpi i/f) on/off,note 1. 0 = vertical sync. line is off (low). 1 = vertical sync. line is on (high). bit d2 C pixel clock (pclk, dpi i/f) on/off,note 1. 0 = pclk line is off (low). 1 = pclk line is on (high). bit d1 C data enable (de, dpi i/f)) on/off,note 1. 0 = de line is off (low). 1 = de line is on (high). bit d0Cparity error on dsi. 0=no parity error. 1=parity error. note: this bit indicates current status of the line when this command has been sent. restriction register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence see description s/w reset see description flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.146- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.6 get_power_mode (0ah) rddpm (read display power mode) 0ah d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 1 0 0a 1 st parameter 1 1 - d7 d6 d5 d4 d3 d2 0 0 xx description this command indicates the current status of the di splay as described in the table below: bit description comment d7 not defined set to 0 d6 idle mode on/off - d5 partial mode on/off - d4 sleep in/out - d3 display normal mode on/off - d2 display on/off - d1 not defined set to 0 d0 not defined set to 0 ? bits d7 for future use and are set to 0. bit d6 C idle mode on/off 0 = idle mode off. 1 = idle mode on. ? bit d5 C partial mode on/off 0 = partial mode off. 1 = partial mode on. bit d4 C sleep in/out 0 = sleep in mode. 1 = sleep out mode. ? bit d3 C display normal mode on/off 0 = display normal mode off. 1 = display normal mode on. bit d2 C display on/off 0 = display is off. 1 = display is on. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x08h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.147- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.148- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.7 read display madctl (0bh) rddmadctl (read display madctl) 0bh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 1 1 0b 1 st parameter 1 1 - d7 d6 d5 d4 d3 d2 d1 d0 xx description this command indicates the current status of the di splay as described in the table below: bit description comment d7 page address order - d6 column address order - d5 page/column order - d4 line address order - d3 rgb/bgr order - d2 display data latch order - d1 source san sequence - d0 gate san sequence - bit d7 C page address order 0 = top to bottom (when madctl b7=0). 1 = bottom to top (when madctl b7=1). bit d6 C column address order 0 = left to right (when madctl b6=0). 1 = right to left (when madctl b6=1). bit d5 C page/column order 0 = normal (when madctl b5=0). 1 = roration (when madctl b5=1). note: for bits d7 to d5, also refer to section 5.3 mcu to memory write/read direction. bit d4 C line address order 0 = lcd refresh top to bottom (when madctl b4=0 ). 1 = lcd refresh bottom to top (when madctl b4=1 ). bit d3 C rgb/bgr order 0 = rgb (when madctl b3=0). 1 = bgr (when madctl b3=1). note: for bits d4 and d3 also refer to section 6.2. 31 set_address_mode (36h). bit d2 C display data latch data order 0 = lcd refresh left to right (when madctl b2=0 ). 1 = lcd refresh right to left (when madctl b2=1 ). ? bit d1 C source san sequence 0 = source output left to right (when madctl b1= 0). 1 = source output right to left (when madctl b1= 1). bit d0 C gate san sequence 0 = gate output top to bottom (when madctl b0=0 ). restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.149- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.150- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.8 get_pixel_format (0ch) rddcolmod (read display colmod) 0ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 0 0 0c 1 st parameter 1 1 - - d6 d5 d4 - d2 d1 d0 xx description this command indicates the current status of the di splay as described in the table below: bit description comment d7 reserved set to 0 d6 - d5 - d4 dpi interface pixel format - d3 reserved set to 0 d2 - d1 - d0 dbi interface pixel format - bits d6, d5, d4 C dpi interface colour pixel format definition bits d2, d1, d0 C dbi interface colour pixel format definition. for setting pixel format, see section 6.2.35 set_pi xel_format (3ah). d6 d5 d4 interface colour format d2 d1 d0 not defined 0 0 0 not defined 0 0 1 not defined 0 1 0 not defined 0 1 1 not defined 1 0 0 16 bit/pixel 1 0 1 18 bit/pixel 1 1 0 24 bit/pixel 1 1 1 if a particular interface, either dbi or dpi, is no t used then the corresponding bits in the parameter returned from the display module are unde fined. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x07h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.151- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.152- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.9 get_display_mode (0dh) rddim (read display image mode) 0dh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 0 1 0d 1 st parameter 1 1 - d7 d6 d5 d4 d3 d2 d1 d0 xx description this command indicates the current status of the di splay as described in the table below: bit d7 C vertical scrolling on/off 0 = vertical scrolling is off. 1 = vertical scrolling is on. bit d6 C horizontal scrolling status this bit is not applicable for this project, so it is set to 0 bit d5 C inversion on/off 0 = inversion is off. 1 = inversion is on. bit d4 C all pixels on 0 = normal display 1 = white display bit d3 C all pixels off 0 = normal display 1 = black display bits d2, d1, d0 C gamma curve selection gamma curve selected d2 d1 d0 gamma set (26h) parameter gamma curve 1 0 0 0 gc0 gamma curve 2 0 0 1 gc1 gamma curve 3 0 1 0 gc2 gamma curve 4 0 1 1 gc3 not defined 1 0 0 not defined not defined 1 0 1 not defined not defined 1 1 0 not defined restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.153- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.154- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.10 get_signal_mode (0eh) rddsm (read display signal mode) 0eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 1 0 0e 1 st parameter 1 1 - d7 d6 d5 d4 d3 d2 d1 d0 xx description t this command indicates the current status of the display as described in the table below: bit d7 C tearing effect line on/off 0 = tearing effect line off. 1 = tearing effect on. ? bit d6 C tearing effect line output mode, see section 5.5. 3 for mode definitions. 0 = mode 1. 1 = mode 2. bit d5 C horizontal sync. (rgb i/f) on/off. 0 = horizontal sync. line is off (low). 1 = horizontal sync. line is on (high). bit d4 C vertical sync. (rgb i/f) on/off. 0 = vertical sync. line is off (low). 1 = vertical sync. line is on (high). bit d3 C pixel clock (pclk, rgb i/f) on/off. 0 = pclk line is off (low). 1 = pclk line is on (high). bit d2 C data enable (de, rgb i/f)) on/off. 0 = de line is off (low). 1 = de line is on (high). bit d0Cparity error on dsi, see read number of the parity errors (05h). 0=no parity error. 1=parity error. d1 C are for future use and are set to 0. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.155- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.11 get_diagnostic_result (0fh) rddsdr (read display self-diagnostic result) 0fh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 1 1 0f 1 st parameter 1 1 - d7 d6 d5 d4 0 0 0 0 xx description the display module returns the self-diagnostic resu lts following a sleep out command. see section 5.15 for a description of the status result s. bit d7 C register loading detection bit d6 C functionality detection bit d5 C chip attachment detection set to 0 if feature unimplemented. bit d4 C display glass break detection set to 0 if feature unimplemented. bits d[3:0] C reserved set to 0. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.156- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.12 enter_sleep_mode (10h) slpin (sleep in) 10h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 0 0 10 parameter no parameter description this command causes the lcd module to enter the min imum power consumption mode. in this mode the dc/dc converter is stopped, intern al oscillator is stopped, and panel scanning is stopped. mcu interface and memory are still working and the memory keeps its contents. restriction this command has no effect when module is already i n sleep in mode. sleep in mode can only be left by the sleep out command (11h). it wil l be necessary to wait 5msec before sending next command, this is to allow time for the supply voltages and clock circuits to stabilize. it will be necessary to wait 120msec aft er sending sleep out command (when in sleep in mode) before sleep in command can be sent. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart it takes 120msec to get into sleep in mode after sl pin command issued. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.157- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.13 exit_sleep_omde (11h) slpout (sleep out) 11h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 0 1 11 parameter no parameter description this command turns off sleep mode. in this mode the dc/dc converter is enabled, internal oscillator is started, and panel scanning is starte d. stop 0v 0v 0v 0v out[1:960] vst etc.(v scanner control logic) dc charge in the capacitor dc:dc converter dc:dc converter dc:dc converter reset pulse for circuit inside panel internal oscillator reset stop start blank memory contents charge restriction this command has no effect when module is already i n sleep out mode. sleep out mode can only be left by the sleep in command (10h). it will be necessary to wait 5msec before sending next command, this is to allow time for the supply voltages and clock circuits to stabilize. the display module loads all display suppliers factory default values to the registers during this 5msec and there cannot be any abnormal visual effec t on the display image if factory default and register values are same when this load is done and when the display module is already sleep out Cmode. the display module is doing self-diagnostic functio ns during this 5msec. it will be necessary to alit 120msec after sending sleep in command (when i n sleep out mode) before sleep out command can be sent. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart it takes 120msec to become sleep out mode after slp out command issued. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.158- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.14 enter_partial_mode (12h) ptlon (partial mode on) 12h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 1 0 12 parameter no parameter description this command turns on partial mode the partial mode window is described by the set_partial_area command (30h). to leave part ial mode, the enter_norma_mode command (13h) should be written. restrictions this command has no effect when partial mode is act ive. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart see partial area (30h) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.159- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.15 enter_normal_mode (13h) noron (normal display mode on) 13h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 1 1 13 parameter no parameter description this command returns the display to normal mode. no rmal display mode is means partial mode off, scroll mode off. restriction this command has no effect when normal display mode is active. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart see partial area and vertical scrolling definition descriptions for details of when to use this command. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.160- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.16 exit_inversion_mode (20h) invoff (display inversion off) 20h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 0 0 20 parameter no parameter description this command is used to recover from display invers ion mode. this command makes no change of contents of frame m emory. this command does not change any other status. (example) memory (example) display restriction this command has no effect when module is already in inversion off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.161- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.17 enter_inversion_mode (21h) invon (display inversion on) 21h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 0 1 21 parameter no parameter description this command is used to enter into display inversio n mode. this command makes no change of contents of frame m emory. every bit is inverted from the frame memory to the display. this command does not change any other status. memory display (example) restriction this command has no effect when module is already in inversion on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.162- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.18 all_pixel_off (22h) allpoff (all pixel off) 22h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 1 0 22 parameter no parameter description this command turns the display panel black in slee p out Cmode and a status of the display on/off Cregister can be on or off. this command makes no change of contents of frame m emory. this command does not change any other status all pixels on, normal display mode on or parti al mode on C commands are used to leave this mode. the display panel is showing the c ontent of the frame memory after normal display mode on and partial mode on Ccom mands. restriction this command has no effect when module is already in inversion on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value power on sequence off s/w reset off flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.163- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.19 all_pixel_on (23h) allpon(all pixel on) 23h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 1 1 23 parameter no parameter description this command turns the display panel white in slee p out Cmode and a status of the display on/off Cregister can be on or off. this command makes no change of contents of frame m emory. this command does not change any other status. all pixels off, normal display mode on or part ial mode on C commands are used to leave this mode. the display is showing the content of the frame memory after normal display mode on and partial mode on Ccommands. restriction this command has no effect when module is already in inversion on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value power on sequence off s/w reset off flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.164- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.20 set_gamma_curve (26h) gamset (gamma set) 26h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 1 1 0 26 parameter 1 1 - gc7 gc6 gc5 gc4 gc3 gc2 gc1 gc0 1..08 description this command is used to select the desired gamma cu rve for the current display. a maximum of 4 fixed gamma curves can be selected. the curves ar e defined in curve correction power supply circuit. the curve is selected by setting th e appropriate bit in the parameter as described in the table: gc[7..0] parameter curve selected 01h gc0 gamma curve 1 (gamma 2.2) 02h gc1 gamma curve 2 (gamma 1.8) 04h gc2 gamma curve 3 (gamma 2.5) 08h gc3 gamma curve 4 (gamma 1.0) note: all other values are undefined. restriction values of gc[7..0] not shown in table above are inv alid and will not change the current selected gamma curve until valid value is r eceived. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default gc[7:0] = 0x01h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.165- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.21 set_display_off (28h) dispoff (display off) 28h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 0 0 28 parameter no parameter description this command is used to enter into display off mode . in this mode, the output from frame memory is disabled and blank page inserted. this command makes no change of contents of frame m emory. this command does not change any other status. there will be no abnormal visible effect on the dis play. restriction this command has no effect when module is already in display off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart legend command parameter display action mode sequential transfer dispoff display on mode display off mode ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.166- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.22 set_display_on (29h) dispon (display on) 29h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 0 1 29 parameter no parameter description this command is used to recover from display off mo de. output from the frame memory is enabled. this command makes no change of contents of frame m emory. this command does not change any other status. restriction this command has no effect when module is already i n display on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.167- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.23 set_clumn_address (2ah) caset (column address set) 2ah d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 1 0 2a 1 st parameter 1 1 - sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 00.. 2 nd parameter 1 1 - sc7 sc6 sc5 sc4 sc3 sc2 sc1 sc0 note 1 3 rd parameter 1 1 - ec15 ec14 ec13 ec12 ec11 ec10 ec9 ec8 00 .. 4 th parameter 1 1 - ec7 ec6 ec5 ec4 ec3 ec2 ec1 ec0 note 1 description this command is used to define area of frame memory where mcu can access. this command makes no change on the other driver st atus. the values of sc[15:0] and ec[15:0] are referred wh en ramwr command comes. each value represents one column line in the frame memory. sc[15:0] ec[15:0] (example) restriction sc[15:0] always must be equal to or less than ec[15 :0] the sc[15] and ec[15]-sc[15]+1 must can be divisibl e by 2. note 1: when sc[15:0] or ec[15:0] is greater than h orizontal line (when madctls b5=0) or vertical line (when madctls b5=1), data of out of range wil l be ignored. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default res_sel[2:0]=000, resoultion 800rgbx1280: sc[15:0] = 0x0000h, ec[15:0] = 0x031fh res_sel[2:0]=001, resoultion 768rgbx1280: sc[15:0] = 0x0000h, ec[15:0] = 0x02ffh res_sel[2:0]=010, resoultion 720rgbx1280: sc[15:0] = 0x0000h, ec[15:0] = 0x02cfh res_sel[2:0]=011, resoultion 600rgbx1024: sc[15:0] = 0x0000h, ec[15:0] = 0x0257h flow chart if needed legend action mode command parameter display sequential transfer caset 1st & 2nd parameter sc[15:0] 3rd & 4th parameter ec[15:0] paset 1st & 2nd parameter sp[15:0] 3rd & 4th parameter ep[15:0] ramwr image data d1[15:0],d2[15:0], ?k.,dn[15:0] any command ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.168- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.24 set_page_address (2bh) paset (page address set) 2bh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 1 1 2b 1 st parameter 1 1 - sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 00 .. 2 nd parameter 1 1 - sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 note 1 3 rd parameter 1 1 - ep15 ep14 ep13 ep12 ep11 ep10 ep9 ep8 00 .. note 1 4 th parameter 1 1 - ep7 ep6 ep5 ep4 ep3 ep2 ep1 ep0 description this command is used to define area of frame memory where mcu can access. this command makes no change on the other driver st atus. the values of sp[15:0] and ep[15:0] are referred wh en ramwr command comes. each value represents one page line in the frame me mory. restriction sp[15:0] always must be equal to or less than ep[15 :0] the sp[15] and ep[15]-sp[15]+1 must can be divisibl e by 2. note 1: when sp[15:0] or ep[15:0] is greater than v ertical line (when madctls b5=0) or horizontal line (when madctls b5=1), data of out of range wil l be ignored. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default res_sel[2:0]=000, resoultion 800rgbx1280: sp[15:0] = 0x0000h, ep[15:0] = 0x04ffh res_sel[2:0]=001, resoultion 768rgbx1280: sp[15:0] = 0x0000h, ep[15:0] = 0x04ffh res_sel[2:0]=010, resoultion 720rgbx1280: sp[15:0] = 0x0000h, ep[15:0] = 0x04ffh res_sel[2:0]=011, resoultion 600rgbx1024: sp[15:0] = 0x0000h, ep[15:0] = 0x03ffh flow chart if needed if needed ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.169- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.25 write_memory_start (2ch) ramwr (memory write) 2ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 1 0 0 2c 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff n th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the host pro cessor to the display modules frame memory starting at the pixel location specified by preceding set_column_address and set_page_address commands. the column and page registers are reset to the star t column (sc) and start page (sp), respectively. pixel data 1 is stored in frame memory at (sc, sp). the column register is then incremented and pixels are written to the frame memory until th e column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are written to the frame memory until the pa ge register equals the end page (ep) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignored. restriction in all colour modes, there is no restriction on len gth of parameters. the transfer pixel number must can be divisible by 2. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default contents of memory is set randomly and not cleared. flow chart legend action mode command parameter display sequential transfer ramwr image data d1[7:0],d2[7:0], ...,dn[7:0] any command ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.170- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.26 raed_memory_start (2eh) ramrd (memory read) 2eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 1 1 0 2e 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff (n+1) th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the display modules frame memory to the host processor starting at the pixel location specified by precedi ng set_column_address and set_page_address commands. the column and page registers are reset to the star t column (sc) and start page (sp), respectively. pixels are read from frame memory at (sc, sp). the column register is then incremented and pixels read from the frame memory until the column registe r equals the end column (ec) value. the column register is then reset to sc and the page re gister is incremented. pixels are read from the frame memory until the pag e register equals the end page (ep) value or the host processor sends another command. restriction in all colour modes, the frame read is always 24bit so there is no restriction on length of parameters . note C memory read is only possible via the paralle l interface. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default contents of memory is set randomly and not cleared. flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.171- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.27 set_partial_area (30h) pltar (partial area) 30h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 0 0 0 30 1 st parameter 1 1 - sr15 sr14 sr13 sr12 sr11 sr10 sr9 sr8 xx 2 nd parameter 1 1 - sr7 sr6 sr5 sr4 sr3 sr2 sr1 sr0 xx 3 rd parameter 1 1 - er15 er14 er13 er12 er11 er10 er9 er8 xx 4 th parameter 1 1 - er7 er6 er5 er4 er3 er2 er1 er0 xx description this command defines the partial modes display are a. there are 4 parameters associated with this command, the first defines the start row (sr) and t he second the end row (er), as illustrated in the figures below. sr and er refer to the frame mem ory line pointer. if end row>start row when madctl b4=0:- if end row>start row when madctl b4=1:- sr[15:0] start row er[15:0] partial area end row if end row -p.173- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.28 set_scroll_area (33h) vscrdef (vertical scrolling definition) 33h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 0 1 1 33 1 st parameter 1 1 - tfa15 tfa14 tfa13 tfa12 tfa11 tfa10 tfa9 tfa8 xx 2 nd parameter 1 1 - tfa7 tfa 6 tfa 5 tfa 4 tfa 3 tfa 2 tfa1 tfa0 xx 3 rd parameter 1 1 - vsa15 vsa14 vsa13 vsa12 vsa11 vsa10 vsa9 vsa8 xx 4 th parameter 1 1 - vsa7 vsa 6 vsa 5 vsa 4 vsa 3 vsa 2 vsa1 vsa0 xx 5 th parameter 1 1 - bfa15 bfa14 bfa13 bfa12 bfa11 bfa10 bfa9 bfa8 xx 6 th parameter 1 1 - bfa7 bfa 6 bfa 5 bfa 4 bfa 3 bfa 2 bfa1 bfa0 xx description this command defines the vertical scrolling area of the display. when madctl b4=0, the 1 st & 2 nd parameter tfa[15..0] describes the top fixed area ( in no. of lines from top of the frame memory and display). the 3 rd & 4 th parameter vsa[15..0] describes the height of the v ertical scrolling area (in no. of lines of the frame memory [not the display] from the vertical scrolling start address). the fir st line read from frame memory appears immediately aft er the bottom most line of the top fixed area. the 5 th & 6 th parameter bfa[15..0] describes the bottom fixed ar ea (in no. of lines from bottom of the frame memory and display). tfa, vsa and bfa ref er to the frame memory line pointer. (0 ,0 ) tfa [ 15:0 ] bfa [15:0] scroll area first line read from frame memory top fixed area bottom fixed area when madctl b4=1 the 1 st & 2 nd parameter tfa[15..0] describes the top fixed area (in no. of lines from bottom of the frame memory and display). the 3 rd & 4 th parameter vsa[15..0] describes the height of the v ertical scrolling area (in no. of lines of the frame memory [not the display] from the vertical scrolling star t address). the first line read from frame memory app ears immediately after the top most line of the top fixed area. the 5 th & 6 th parameter bfa[15..0] describes the bottom fixed ar ea (in no. of lines from top of the frame memory and display). (0 ,0 ) scroll area first line read from frame memory top fixed area bottom fixed area tfa [ 15:0 ] bfa [15:0] restriction the condition is (tfa+vsa+bfa)= vertical line numbe r, otherwise scrolling mode is undefined. in vertical scroll mode, madctl b5 should be set to 0 C this only affects the frame memory write. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.174- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 default status default value res_sel[2:0]=000, 800rgbx1280 tfa[15..0]= 0x0000h vsa[15..0]= 0x0500h bfa[15..0]= 0x0000h res_sel[2:0]=001, 768rgbx1280 tfa[15..0]= 0x0000h vsa[15..0]= 0x0500h bfa[15..0]= 0x0000h res_sel[2:0]=010, 720rgbx1280 tfa[15..0]= 0x0000h vsa[15..0]= 0x0500h bfa[15..0]= 0x0000h res_sel[2:0]=011, 600rgbx1024 tfa[15..0]= 0x0000h vsa[15..0]= 0x0400h bfa[15..0]= 0x0000h flow charts 1.to enter vertical scroll mode: display action mode legend ramrw scroll mode caset madctl only required for nonrolling scrolling normal mode vscrdef 1st & 2nd parameter tfa[15...0] 3rd & 4th parameter vsa[15...0] 5th & 6th parameter bfa[15...0] 1st & 2nd parameter sc[15...0] 3rd & 4th parameter ec[15...0] paset 1st & 2nd parameter sp[15...0] 3rd & 4th parameter ep[15..0] parameter scroll image data vscrsadd 1st & 2nd parameter vsp[15...0] command parameter sequential transfer redefines the frame memory window that the scroll data will be written to. see note 1 optional ?v it may be necessary to redefine the frame memory write direction. note: the frame memory window size must be defined correc tly otherwise undesirable image will be displayed. 2. continuous scroll: ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.175- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 action mode legend command parameter display sequential transfer scroll mode caset 1st & 2nd parameter sc[15..0] 3rd & 4th parameter ec[15..0] paset 1st & 2nd parameter sp[15..0] 3rd & 4th parameter ep[15..0] ramrw scroll image data vscrsadd 1st & 2nd parameter vsp[15..0] 3. to leave vertical scroll mode: note: scroll mode can be left by both the normal display mode on (13h) and partial mode on (12h) commands. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.176- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 6.2.29 tearing effect line off (34h) teoff (tearing effect line off) 34h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 0 0 34 parameter no parameter description this command is used to turn off (active low) the t earing effect output signal from the te signal line. restriction this command has no effect when tearing effect output is already off. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default off flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.177- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.30 set_tear_on (35h) teon (tearing effect line on) 35h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 0 1 35 parameter 1 1 - x x x x x x x m xx description this command is used to turn on the tearing effect output signal from the te signal line. this output is not affected by changing madct l bit b4. the tearing effect line on has one parameter which describes the mode of the tearing effect output line. (x=dont care). when m=0: the tearing effect output line consists of v-blanki ng information only: vertical time scale t vdl t vdh when m=1: the tearing effect output line consists of both v-b lanking and h-blanking information: t vdh t vdl vertical time scale note: during sleep in mode with tearing effect line on, te aring effect output pin will be active low. restriction this command has no effect when tearing effect output is already on. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default off flow chart teon m legend action mode command parameter display sequential transfer te line output off te line output on ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.178- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.31 set_address_mode (36h) madctl (memory access control) 36h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 1 0 36 1 st parameter 1 1 - b7 b6 b5 b4 b3 b2 b1 b0 xx description this command defines read/write scanning direction o f frame memory. this command makes no change on the other driver st atus. bit assignment bit name description b7 page address order (my) b6 column address order (mx) b5 page/column selection (mv) these 3 bits controls mcu to memory write/read direction. b4 vertical order (ml) lcd vertical refresh direction co ntrol b3 rgb-bgr order (bgr) colour selector switch control (0=rgb colour filter panel, 1=bgr colour filter panel) b2 horizontal order (mh) lcd horizontal refresh directi on control b1 flip horizontal (ss) select the source driver scan direction on panel module b0 flip vertical (gs) select the gate driver scan direction on panel module b3= 1 sig480 r g b g b g b r r g b g b r r g b g b r r r g b r g b r g b r g b r g b r g b r g b r g b r g b b3= 0 sig1 sig1 lcd panel sig2 sig480 sig2 rgb-bgr order lcd panel sig480 sig1 sig2 sig1 sig2 sig480 driver ic driver ic sent first (1) sent 2nd sent 3rd sent last (480) sent 3rd sent 2nd sent first (1) sent last (480) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.179- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 source scan sequence (ss) gate scan sequence (gs) note: top-left (0,0) means a physical memory locatio n. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value power on sequence b7=0,b6=0,b5=0,b4=0,b3=0,b2=0,b1= 0,b0=0 s/w reset no change flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.180- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.32 set_scroll_start (37h) vscrsadd (vertical scrolling start address) 37h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 1 1 37 1 st parameter 1 1 - vsp 15 vsp 14 vsp 13 vsp 12 vsp 11 vsp 10 vsp 9 vsp 8 2 nd parameter 1 1 - vsp 7 vsp 6 vsp 5 vsp 4 vsp 3 vsp 2 vsp 1 vsp 0 00.. 4ff description this command is used together with vertical scrolli ng definition (33h). these two commands describe the scrolling area and the scroll ing mode. the vertical scrolling start address command has one parameter which describes t he address of the line in the frame memory that will be written as the first line after the last line of the top fixed area on the display as illustrated below:- when madctl b4=0 example: when top fixed area = bottom fixed area = 00, verti cal scrolling area = 1280(dm=10) and when madctl b4=1 example: when top fixed area = bottom fixed area = 00, verti cal scrolling area = 1280(dm=10) and when new pointer position and picture data are sent , the result on the display will happen at the next panel scan to avoid tearing effect. vsp re fers to the frame memory line pointer. restriction since the value of the vertical scrolling start add ress is absolute (with reference to the frame memory), it must not enter the fixed area (de fined by vertical scrolling definition (33h) C otherwise undesirable image will be display ed on the panel. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out no partial mode on, idle mode on, sleep out no default vsp[15:0]= 0x0000h flow chart see vertical scrolling definition (33h) description. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.181- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.33 idle mode off (38h) idmoff (idle mode off) 38h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 0 0 38 parameter no parameter description this command is used to recover from idle mode on. in the idle off mode, lcd can display maximum 16.7m colours. restriction this command has no effect when module is already in idle off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default idle mode is off. flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.182- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.34 enter_idle_mode (39h) idmon (idle mode on) 39h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 0 1 39 parameter no parameter description this command is used to enter into idle mode on. in the idle on mode, colour expression is reduced. the primary and the secondary colours usin g msb of each r, g and b in the frame memory, 8 colour depth data is displayed. display (example) memory memory contents vs. display colour r7 - r0 g7 - g0 b7 - b0 black 0xxxxx 0xxxxx 0xxxxx blue 0xxxxx 0xxxxx 1xxxxx red 1xxxxx 0xxxxx 0xxxxx magent 1xxxxx 0xxxxx 1xxxxx green 0xxxxx 1xxxxx 0xxxxx cyan 0xxxxx 1xxxxx 1xxxxx yellow 1xxxxx 1xxxxx 0xxxxx white 1xxxxx 1xxxxx 1xxxxx x=dont care restriction this command has no effect when module is already in idle on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default idle mode is off. flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.183- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.35 set_pixel_format (3ah) colmod (interface pixel format) 3a h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 1 0 3a 1 st parameter 1 1 - x d6 d5 d4 x d2 d1 d0 xx description this command is used to define the format of rgb pi cture data. d6~d4 : dpi pixel format definition. d2~d0 : dbi pixel format definition. the formats are shown in the table: pixel format d6/d2 d5/d1 d4/d0 not defined 0 0 0 not defined 0 0 1 not defined 0 1 0 not defined 0 1 1 not defined 1 0 0 16 bit/pixel 1 0 1 18 bit/pixel 1 1 0 24 bit/pixel 1 1 1 if a particular interface, enter dbi or dpi, is not used then the correspondind bits in the parameter returned from the display module unde fined. restriction there is no visible effect until the fr ame memory is written to. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence 24 bit/pixel flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.184- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.36 write_memory_contiune (3ch) write_memory_contiune 3ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 1 0 0 3c 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff n th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the host pro cessor to the display modules frame memory continuing from the pixel location following the previous write_memory_continue or write_memory_start command. sending any other comma nd can stop frame write. if set_address_mode b5 = 0: data is written continuing from the pixel location after the write range of the previous write_memory_start or write_memory_continue. the co lumn register is then incremented and pixels are written to the frame memory until th e column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are written to the frame memory until the pa ge register equals the end page (ep) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignore d. if set_address_mode b5 = 1: data is written continuing from the pixel location after the write range of the previous write_memory_start or write_memory_continue. the pa ge register is then incremented and pixels are written to the frame memory until the pa ge register equals the end page (ep) value. the page register is then reset to sp and th e column register is incremented. pixels are written to the frame memory until the column re gister equals the end column (ec) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignored. restriction in all colour modes, there is no restriction on len gth of parameters. the transfer pixel number must can be divisible by 2. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence contents of memory is set randomly s/w reset contents of memory is set randomly flow chart legend action mode command parameter display sequential transfer ramwr image data d1[7:0],d2[7:0], ...,dn[7:0] any command ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.185- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.37 raed_memory_continue (3eh) raed_memory_continue 3eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 1 1 0 3e 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff (n+1) th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the display modules frame memory to the host processor continuing from the location following th e previous read_memory_continue or read_memory_start command. if set_address_mode b5=0: pixels are read continuing from the pixel location after the read range of the previous read_memory_start or read_memory_continue. the colu mn register is then incremented and pixels are read from the frame memory until the column register equals the end column (ec) value. the column register is then rese t to sc and the page register is incremented. pixels are read from the frame memory until the page register equals the end page (ep) value or the host processor sends another command. if set_address_mode b5=1: pixels are read continuing from the pixel location after the read range of the previous read_memory_start or read_memory_continue. the page register is then incremented and pixels are read from the frame memory until the pag e register equals the end page (ep) value. the page register is then reset to sp and th e column register is incremented. pixels are read from the frame memory until the column reg ister equals the end column (ec) value or the host processor sends another command. restriction regardless of the color mode set in set_pixel_forma t, the pixel format returned by read_memory_continue is always 24-bit so there is n o restriction on the length of data. a read_memory_start should follow a set_column_addr ess, set_page_address or set_address_mode to define the read location. other wise, data read with read_memory_continue is undefined. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence contents of memory is set randomly flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.186- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.38 set tear scan lines (44h) tesl (tear effect scan lines) 44h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 0 0 1 0 0 44 1 st parameter 1 1 - teline[15:8](8b0) 00..ff 2 nd parameter 1 1 - teline[7:0](8b0) 00..ff description this command is turns on the display modules teari ng effect output signal on the te signal line when the display module reacfes line teline. t he te signal is not affected by changing madctl bit b4. the tearing effect line on has one parameter which describes the mode of the tearing effect output line. the tearing effect output line consists of v-blanki ng information only: vertical time scale t vdl t vdh note: that teline=0 is equivalent to temode=0. the tearing effect output line shall be active low when the display module is in sleep mode . restriction the command has no effect when tearing effect output is already on. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default teline[15:0]=0x0000h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.187- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.39 get the current scanline(45h) getscan (get the current scanline) 45h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 0 0 1 0 1 45 1 st parameter 1 1 - sln[15:8](8b0) 00..ff 2 nd parameter 1 1 - sln[7:0](8b0) 00..ff description the display module returns the current scanline, n, used to update the display device. the total number of scanlines on a display device is de fined as vsync + vbp + vact + vfp. the first scanline is defined as the first line of v sync and is denoted as line 0. when in sleep mode, the value returned by get_scanl ine is undefined. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default sln[15:0]= 0x0000h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.188- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.40 write display brightness (51h) wrdisbv (write display brightness) 51h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 0 1 51 1 st parameter 1 1 - dbv[7:0] 00 .. ff description this command is used to adjust the brightness value of the display. it should be checked what the relationship between this written value and out put brightness of the display is. this relationship is defined on the display module speci fication. in principle relationship is that 00h value means t he lowest brightness and ffh value means the highest brightness. see chapter 5.17.3 brightness control block. restriction - register availability status availability sleep out yes sleep in yes default dbv[7:0]= 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.189- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.41 read display brightness value (52h) rddisbv (read display brightness value) 52h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 1 0 52 1 st parameter 1 1 - dbv[7:0] xx description this command returns the brightness value of the di splay. it should be checked what the relationship between this returned value and output brightness of the display. this relationship is defined on the displa y modulespecification is. in principle the relationship is that 00h value mea ns the lowest brightness and ffh value means the highest brightness. see chapters: 5.17.3 brightness control block, an d 6.2.40 write display brightness (51h) dbv[7:0] is reset when display is in sleep-in mode. dbv[7:0] is 0 when bit bctrl of 6.2.42 write ctr l display (53h) command is 0. dbv[7:0] is manual set brightness specified with 6 .2.42 write ctrl display (53h) command when bit bctrl is 1. when bit bctrl of 6.2.42 write ctrl display (53h) command is 1 and bit c1/c0 of 6.2.44 write content adaptive brightness contro l (55h) are 0, dbv[7:0] output is the brightness value specified with 6.2.40 write displ ay brightness (51h) command. restriction - register availability status availability sleep out yes sleep in yes default dbv[7:0]= 0x00h flow chart command display action mode parameter sequential transfer legend read rddisbv send 1 st parameter serial i/f mode host display ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.190- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.42 write ctrl display (53h) wrctrld (write control display) 53h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 1 1 53 1 st parameter 1 1 - xx xx bctrl xx dd bl xx xx 00 .. ff description this command is used to control display brightness. bctrl: brightness control block on/off, this bit is always used to switch brightness for display. 0 = off (brightness registers are 00h, dbv[7..0]) 1 = on (brightness registers are active, according to the other parameters.) display dimming (dd): (only for manual brightness s etting) dd = 0: display dimming is off dd = 1: display dimming is on bl: backlight control on/off 0 = off (completely turn off backlight circuit. con trol lines must be low. ) 1 = on dimming function is adapted to the brightness regis ters for display when bit bctrl is changed at dd=1, e.g. bctrl: 0 -> 1 or 1-> 0. when bl bit change from on to off, backlight is turned off without gradual dimming, even if dimming-on (dd=1) are selected. x = dont care. restriction - register availability status availability sleep out yes sleep in yes default d[7:0]= 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.191- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.43 read ctrl value display (54h) rdctrld (read control value display) 54h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 0 0 54 1 st parameter 1 1 - 0 0 bctrl 0 dd bl 0 0 xx description this command returns ambient light and brightness c ontrol values, see chapter: 6.2.42 write ctrl display (53h). bctrl: brightness control block on/off, this bit is always used to switch brightness for display. 0 = off 1 = on display dimming (dd): dd = 0: display dimming is off dd = 1: display dimming is on bl: backlight control on/off 0 = off (completely turn off backlight circuit) 1 = on restriction - register availability status availability sleep out yes sleep in yes default d[7:0]= 0x00h flow chart command displa y action mode parameter sequential transfer legend read rdctrld serial i/f mode host display send 1st parameter ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.192- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.44 write content adaptive brightness control (5 5h) wrcabc (write content adaptive brightness control) 55 h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 0 1 55 1 st parameter 1 1 - xx xx xx xx xx xx c1 c0 xx description this command is used to set parameters for image co ntent based adaptive brightness control functionality. there is possible to use 4 different modes for cont ent adaptive image functionality, which are defined on a table below. see chapter 5. 17 content adaptive brightness control (cabc). c1 c0 function 0 0 off 0 1 user interface image 1 0 still picture 1 1 moving image x = dont care. restriction register availability status availability sleep out yes sleep in yes default cabc[1:0] = 00 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.193- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.45 read content adaptive brightness control (56 h) rdcabc (read content adaptive brightness control) 56h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 1 0 56 1 st parameter 1 1 - 0 0 0 0 0 0 c1 c0 xx description this command is used to set parameters for image co ntent based adaptive brightness control functionality. there is possible to use 4 different modes for cont ent adaptive image functionality, which are defined on a table below. see chapter 5. 17 content adaptive brightness control (cabc). c1 c0 function 0 0 off 0 1 user interface image 1 0 still picture 1 1 moving image restriction register availability status availability sleep out yes sleep in yes default c[1:0] = 00 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.194- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.46 write cabc minimum brightness (5eh) wrcabcmb (write cabc minimum brightness) 5e h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 1 1 1 0 5e 1 st parameter 1 1 1 - cmb[7:0] 00 .. ff description this command is used to set the minimum brightness value of the display for cabc function. in principle relationship is that 00h value means t he lowest brightness for cabc and ffh value means the highest brightness for cabc. see chapter 5.17.4 minimum brightness setting of c abc function. restriction - register availability status availability sleep out yes sleep in yes default cmb[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.195- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 6.2.47 read cabc minimum brightness (5fh) rdcabcmb (read cabc minimum brightness) 5fh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 1 1 1 1 5f 1 st parameter 1 1 - cmb[7:0] xx description this command returns the minimum brightness value o f cabc function. in principle the relationship is that 00h value mea ns the lowest brightness and ffh value means the highest brightness. see chapter 5.17.4 minimum brightness setting of c abc function. cmb[7:0] is cabc minimum brightness specified with 6.2.46 write cabc minimum brightness (5eh) command. restriction - register availability status availability sleep out yes sleep in yes default cmb[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.196- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.48 read automatic brightness control self-diagn ostic result (68h) rdabcsdr (read automatic brightness control self-di agnostic result) 68h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 1 0 1 0 0 0 68 1 st parameter 1 1 - d[7:6] 0 0 0 0 0 0 xx description this command indicates the status of the display se lf-diagnostic results for automatic brightness control after sleep out -comma nd as described in the table below: bit d7 C register loading detection see section 5.15.1 register loading detection. bit d6 C functionality detection see section 5.15.2 functionality detection . bits d5, d4, d3, d2, d1 and d0 are for future use a nd are set to 0. restriction - register availability status availability sleep out yes sleep in yes default d[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.197- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, tft mobile single chip driver data sheet v01 6.2.49 read_ddb_start (a1h) read_ddb_start a1h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 0 0 0 0 1 a1 1 st parameter 1 1 - x x x x x x x x xx : 1 1 - x x x x x x x x xx n th parameter 1 1 - x x x x x x x x xx description this command reads identifying and descriptive info rmation from the peripheral. this information is organized in the device descriptor b lock (ddb) stored on the peripheral. the response to this command returns a sequence of byte s that may be any length up to 64k bytes. note that the returned sequence of bytes doe s not necessarily correspond to the entire ddb; it may be a portion of a larger block of data. the format of returned data is as follows: parameter 1: ls (least significant) byte of supplie r id. supplier id is a unique value assigned to each peripheral supplier by the mipi organizatio n. parameter 2: ms (most significant) byte of supplier id. parameter 3: ls (least significant) byte of supplie r elective data. this is a byte of information that is determined by the supplier. it could includ e model number or revision information, for example. parameter 4: ms (most significant) byte of supplier elective data parameter 5: single-byte escape or exit code (eec). the code is interpreted as follows: - ffh - exit code C there is no more data in the de scriptor block - 00h - escape code C there is supplier-proprietary data in the descriptor block (does not conform to any mipi standard) - any other value C there is ddb data in the descri ptor block. the format and interpretation of this data is documented in mipi alliance standard for device descriptor block (ddb) . ddbs may contain many more data fields providing in formation about the peripheral. in a dsi system, read activity takes the form of tw o separate transactions across the bus: first the read command read_ddb_start from host processor to peripheral, which includes the bus turn-around token. the peripheral then takes control of the bus and re turns the requested data. the peripheral response to read_ddb_start is a long packet type, s o its length may be up to 64k bytes unless limited by a previous set_max_return_size co mmand. the response to a read_ddb_start command always sta rts at the beginning of the device descriptor block. after receiving the first packet and processing the returned ddb data, the host processor may initiate a read_ddb_continue com mand to access the next portion of the ddb. a read_ddb_continue command begins the next re ad at the location following the last byte of the previous data read from the ddb. subsequent read_ddb_continue commands can be used t o read a ddb or supplier-proprietary block of arbitrary size. there is, however, no obligation to read the entire block. the host processor may choose to stop readin g after completion of any read_ddb_xxx command. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x00h ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.198- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.199- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.50 read_ddb_continue (a8h) read_ddb_continue a8h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 0 1 0 0 0 a8 1 st parameter 1 1 - x x x x x x x x xx : 1 1 - x x x x x x x x xx n th parameter 1 1 - x x x x x x x x xx description a read_ddb_start command should be executed at leas t once before a read_ddb_continue command to define the read location. otherwise, dat a read with a read_ddb_continue command is undefined. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x00h flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.200- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.51 read id1 (dah) rdid1 (read id1) dah dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 0 1 0 da 1 st parameter 1 1 - modules manufacturer[7:0] xx description this read byte identifies the lcd modules manufactur er. it is specified by display supplier and for xx is defined as xxhex. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id1[7:0]=0x00h define by customer flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.201- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.52 read id2 (dbh) rdid2 (read id2) dbh dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 0 1 1 db 1 st parameter 1 1 - lcd module/driver version [7:0] - description this read byte is used to track the lcd module/driv er version. it is defined by display supplier and changes each time a revision is made t o the display, material or construction specifications. s ee table: id byte value v[7:0] version changes 80h 81h 82h 83h 84h 85h x= don't care restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id2[7:0]=0x00h define by customer flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.202- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.53 read id3 (dch) rdid3 (read id3) dch dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 1 0 0 dc 1 st parameter 1 1 - lcd module/driver id[7:0] xx description this read byte identifies the lcd module/driver. it i s specified by display supplier and for this lcd project module is defined as xxhex. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id3[7:0]=0x00h define by customer flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.203- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.54 setosc: set internal oscillator (b0h) setosc( set internal oscillator) b0h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 1 0 0 dc 1 st parameter 1 1 - - - - - - - - osc _en - 2 nd parameter 1 1 - - - - - uadj[3:0] - description this command is used to set internal oscillator rel ated setting osc_en : enable internal oscillator, high active. if send sleep out command(11h), osc_en wil l set1 by ic internal circuit. if send sleep in command(10h), osc_en will set 0 by ic internal circuit. uadj[3:0]: for user to adjust osc frequency, default is 48 mhz . uadj internal oscillator frequency 0 0 0 0 41% 0 0 0 1 50% 0 0 1 0 59% 0 0 1 1 68% 0 1 0 0 77% 0 1 0 1 85% 0 1 1 0 92% 0 1 1 1 100% 1 0 0 0 109% 1 0 0 1 115% 1 0 1 0 123% 1 0 1 1 130% 1 1 0 0 136% 1 1 0 1 145% 1 1 1 0 151% 1 1 1 1 158% restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset osc_en=0, uadj[3:0]= 4b0111 uadj[3:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.204- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.55 setpower: set power (b1h) setpower( set power related setting) b1h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 0 1 b1 1 st parameter 1 1 - - vsn_ en vsp_ en vgl_ en vgh_ en vcl_ en vddd n_hz stb - 2 nd parameter 1 1 - - - - - - - - dstb - 3 rd parameter 1 1 - - fs1[2:0] - ap[2:0] - 4 th parameter 1 1 - vghs[3:0] vgls[3:0] - 5 th parameter 1 1 - dt[1:0] - - - - - - - 6 th parameter 1 1 - - - - btp[4:0] - 7 th parameter 1 1 - - - - btn[4:0] - 8 th parameter 1 1 - vrhp[7:0] - 9 th parameter 1 1 - vrhn[7:0] - 10 th parameter 1 1 - - - vrmp[5:0] - 11 th parameter 1 1 - - - vrmn[5:0] - 12 th parameter 1 1 - - apf_ en dd_t u vpnl _en - - pccs[1:0] - 13 th parameter 1 1 - - dc86_div[3:0] xdk1 xdk0 auto _xdk - description this command is used to set related setting of powe r. stb: when stb = 1, the HX8392-A enters the standby mod e, where all display operation stops, suspend all the internal operations. but the intern al r-c oscillator stop or not is determined by osc_en bit. to minimize the standby power, please s et osc_en to 0. during the standby mode, only the following process can be executed. a. exit the standby mode (stb = 0) b. enable or disable the oscillation c. software reset if send sleep out command(11h), stb will set0 by ic internal circuit. if send sleep in command(10h), stb will set 1 by ic internal circuit. dstb: standby mode select. when stb = 1 and dstb = 0, the HX8392-A enters the standby mode. when stb = 1 and dstb = 1, the HX8392-A enters the deep standby mode. the HX8392-A into the deep_standby mode, where all display operation stops, suspend all the internal operations including the internal r-c osci llator. in the deep standby mode, the gram data and registe r content may be lost. for preventing this, they have to reset again after the deep standby mod e cancel. vsp_en: on/off the operation of vsp circuit. vsp_en operation of vsp dc/dc circuit 0 off 1 on if send sleep out command(11h), vsp_en will set1 by ic internal circuit. if send sleep in command(10h), vsp_en will set 0 by ic internal circuit. vsn_en: on/off the operation of vsn circuit. vsn_en operation of vsn dc/dc circuit 0 off 1 on if send sleep out command(11h), vsn_en will set1 by ic internal circuit. if send sleep in command(10h), vsn_en will set 0 by ic internal circuit. vgh_en: on/off the operation of vgh charge bump circuit. vgh_en operation of vgh charge bump circuit 0 off 1 on if send sleep out command(11h), vgh_en will set1 by ic internal circuit. if send sleep in command(10h), vgh_en will set 0 by ic internal circuit. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.205- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 vgl_en : on/off the operation of vgl charge bump circuit. vgl_en operation of vgl charge bump circuit 0 off 1 on if send sleep out command(11h), vgl_en will set1 by ic internal circuit. if send sleep in command(10h), vgl_en will set 0 by ic internal circuit. vcl_en : on/off the operation of vcl charge bump circuit. vcl_en operation of vcl charge bump circuit 0 off 1 on if send sleep out command(11h), vcl_en will set1 by ic internal circuit. if send sleep in command(10h), vcl_en will set 0 by ic internal circuit. vdddn_hz: choose external or internal vdddn power. vdddn_hz=0, vdddn= -2.5v. vdddn_hz=1, vdddn output hz. (for external vdddn.) fs1[2:0]: set the operating frequency of the step-up circuit for vgh and vgl voltage generation. fs12 fs11 fs10 operation frequency of step-up circuit 0 0 0 inhibit 0 0 1 fosc/64 0 1 0 fosc/128 0 1 1 fosc/256 1 0 0 fosc/512 1 0 1 fosc/1024 1 1 0 fosc/2048 1 1 1 fosc/4096 ap[2:0]: adjust the amount of fixed current from the fixed current source for the operational amplifier in the power supply circuit. when the amo unt of fixed current is increased, the lcd driving capacity and the display quality are high, but the current consumption is increased. this is a tradeoff, adjust the fixed current by considering b oth the display quality and the current consumption. during no display operation, when ap[2 :0] = 000, the current consumption can be reduced by stopping the operations of operational a mplifier and step-up circuit. ap2 ap1 ap0 constant current of operational amplifier 0 0 0 stop 0 0 1 0.5 m a 0 1 0 1 m a 0 1 1 1.5 m a 1 0 0 2 m a 1 0 1 2.5 m a 1 1 0 3 m a 1 1 1 3.5 m a vghs[3:0] : switch the output factor for dc/dc circuit for vgh voltage generation. the lcd drive voltage level vgh can be selected according to the characteristic of liquid crystal which panel used . vghs3 vghs2 vghs1 vghs0 vgh 0 0 0 0 inhibit 0 0 0 1 9.2 0 0 1 0 9.4 0 0 1 1 9.6 0 1 0 0 9.8 0 1 0 1 10.0 0 1 1 0 10.2 0 1 1 1 10.4 1 0 0 0 10.6 1 0 0 1 10.8 1 0 1 0 11.0 1 0 1 1 11.2 1 1 0 0 11.4 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.206- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 1 1 0 1 11.6 1 1 1 0 11.8 1 1 1 1 12.0 vgls[3:0] : switch the output factor for dc/dc circuit for vgl voltage generation. the lcd drive voltage level vgl can be selected according to the characteristic of liquid crystal which panel used . vgls3 vgls2 vgls1 vgls0 vgl 0 0 0 0 -5.0 0 0 0 1 -5.2 0 0 1 0 -5.4 0 0 1 1 -5.6 0 1 0 0 -5.8 0 1 0 1 -6.0 0 1 1 0 -6.2 0 1 1 1 -6.4 1 0 0 0 -6.6 1 0 0 1 -6.8 1 0 1 0 -7.0 1 0 1 1 -7.2 1 1 0 0 -7.4 1 1 0 1 -7.6 1 1 1 0 -7.8 1 1 1 1 -8.0 dt[1:0]: delay time of power on and power off sequence. dt1 dt0 delay time of power on and power off sequence on (m s) 0 0 5ms 0 1 10ms 1 0 15ms 1 1 20ms btp[4:0]: switch the output factor for dc/dc circuit for vsp voltage generation. the lcd drive voltage level vsp can be selected according to the characteristic of liquid crystal which panel used. while using intermal charge pump mode (pccs1-0 = 10 ) or hx5186-a mode (pccs1-0 = 11), vsn = -vsp. btp4 btp3 btp2 btp1 btp0 vsp 0 0 0 0 0 3.01 0 0 0 0 1 3.15 0 0 0 1 0 3.29 0 0 0 1 1 3.46 0 0 1 0 0 3.60 0 0 1 0 1 3.74 0 0 1 1 0 3.91 0 0 1 1 1 4.05 0 1 0 0 0 4.19 0 1 0 0 1 4.36 0 1 0 1 0 4.50 0 1 0 1 1 4.64 0 1 1 0 0 4.81 0 1 1 0 1 4.95 0 1 1 1 0 5.09 0 1 1 1 1 5.26 1 0 0 0 0 5.40 1 0 0 0 1 5.54 1 0 0 1 0 5.71 1 0 0 1 1 inhibit ????? inhibit 1 1 1 1 1 inhibit ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.207- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 btn[4:0]: for pccs1-0 = 00(internal used, not open) only. sw itch the output factor of dc/dc circuit for vsn voltage generation. the lcd drive v oltage level vsn can be selected according to the characteristic of liquid crystal which panel us ed. while using intermal charge pump mode (pccs1-0 = 10 ) or hx5186-a mode (pccs1-0 = 11), vsn = -vsp btn4 btn3 btn2 btn1 btn0 vsn 0 0 0 0 0 -3.01 0 0 0 0 1 -3.15 0 0 0 1 0 -3.29 0 0 0 1 1 -3.46 0 0 1 0 0 -3.60 0 0 1 0 1 -3.74 0 0 1 1 0 -3.91 0 0 1 1 1 -4.05 0 1 0 0 0 -4.19 0 1 0 0 1 -4.36 0 1 0 1 0 -4.50 0 1 0 1 1 -4.64 0 1 1 0 0 -4.81 0 1 1 0 1 -4.95 0 1 1 1 0 -5.09 0 1 1 1 1 -5.26 1 0 0 0 0 -5.40 1 0 0 0 1 -5.54 1 0 0 1 0 -5.71 1 0 0 1 1 inhibit ????? inhibit 1 1 1 1 1 inhibit vrhp[7:0]: vspr regulator output control setting for source da ta output driving. vrhp[7:0] vspr 0 0 0 0 0 0 0 0 3.488 0 0 0 0 0 0 0 1 3.516 0 0 0 0 0 0 1 0 3.544 0 0 0 0 0 0 1 1 3.572 0 0 0 0 0 1 0 0 3.600 0 0 0 0 0 1 0 1 3.628 0 0 0 0 0 1 1 0 3.656 0 0 0 0 0 1 1 1 3.684 0 0 0 0 1 0 0 0 3.713 0 0 0 0 1 0 0 1 3.741 0 0 0 0 1 0 1 0 3.769 0 0 0 0 1 0 1 1 3.797 0 0 0 0 1 1 0 0 3.825 0 0 0 0 1 1 0 1 3.853 0 0 0 0 1 1 1 0 3.881 0 0 0 0 1 1 1 1 3.909 0 0 0 1 0 0 0 0 3.938 0 0 0 1 0 0 0 1 3.966 0 0 0 1 0 0 1 0 3.994 0 0 0 1 0 0 1 1 4.022 0 0 0 1 0 1 0 0 4.050 0 0 0 1 0 1 0 1 4.078 0 0 0 1 0 1 1 0 4.106 0 0 0 1 0 1 1 1 4.134 0 0 0 1 1 0 0 0 4.163 0 0 0 1 1 0 0 1 4.191 0 0 0 1 1 0 1 0 4.219 0 0 0 1 1 0 1 1 4.247 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.208- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 0 0 1 1 1 0 0 4.275 0 0 0 1 1 1 0 1 4.303 0 0 0 1 1 1 1 0 4.331 0 0 0 1 1 1 1 1 4.359 0 0 1 0 0 0 0 0 4.388 0 0 1 0 0 0 0 1 4.416 0 0 1 0 0 0 1 0 4.444 0 0 1 0 0 0 1 1 4.472 0 0 1 0 0 1 0 0 4.500 0 0 1 0 0 1 0 1 4.528 0 0 1 0 0 1 1 0 4.556 0 0 1 0 0 1 1 1 4.584 0 0 1 0 1 0 0 0 4.613 0 0 1 0 1 0 0 1 4.641 0 0 1 0 1 0 1 0 4.669 0 0 1 0 1 0 1 1 4.697 0 0 1 0 1 1 0 0 4.725 0 0 1 0 1 1 0 1 4.753 0 0 1 0 1 1 1 0 4.781 0 0 1 0 1 1 1 1 4.809 0 0 1 1 0 0 0 0 4.838 0 0 1 1 0 0 0 1 4.866 0 0 1 1 0 0 1 0 4.894 0 0 1 1 0 0 1 1 4.922 0 0 1 1 0 1 0 0 4.950 0 0 1 1 0 1 0 1 4.978 0 0 1 1 0 1 1 0 5.006 0 0 1 1 0 1 1 1 5.034 0 0 1 1 1 0 0 0 5.063 0 0 1 1 1 0 0 1 5.091 0 0 1 1 1 0 1 0 5.119 00111011 ~ 01111110 inhibit 0 1 1 1 1 1 1 1 vsp 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz vrhn[7:0]: vsnr regulator output control setting for source da ta output driving. vrhn[7:0] vsnr 0 0 0 0 0 0 0 0 -3.263 0 0 0 0 0 0 0 1 -3.291 0 0 0 0 0 0 1 0 -3.319 0 0 0 0 0 0 1 1 -3.347 0 0 0 0 0 1 0 0 -3.375 0 0 0 0 0 1 0 1 -3.403 0 0 0 0 0 1 1 0 -3.431 0 0 0 0 0 1 1 1 -3.459 0 0 0 0 1 0 0 0 -3.488 0 0 0 0 1 0 0 1 -3.516 0 0 0 0 1 0 1 0 -3.544 0 0 0 0 1 0 1 1 -3.572 0 0 0 0 1 1 0 0 -3.600 0 0 0 0 1 1 0 1 -3.628 0 0 0 0 1 1 1 0 -3.656 0 0 0 0 1 1 1 1 -3.684 0 0 0 1 0 0 0 0 -3.713 0 0 0 1 0 0 0 1 -3.741 0 0 0 1 0 0 1 0 -3.769 0 0 0 1 0 0 1 1 -3.797 0 0 0 1 0 1 0 0 -3.825 0 0 0 1 0 1 0 1 -3.853 0 0 0 1 0 1 1 0 -3.881 0 0 0 1 0 1 1 1 -3.909 0 0 0 1 1 0 0 0 -3.938 0 0 0 1 1 0 0 1 -3.966 0 0 0 1 1 0 1 0 -3.994 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.209- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 0 0 1 1 0 1 1 -4.022 0 0 0 1 1 1 0 0 -4.050 0 0 0 1 1 1 0 1 -4.078 0 0 0 1 1 1 1 0 -4.106 0 0 0 1 1 1 1 1 -4.134 0 0 1 0 0 0 0 0 -4.163 0 0 1 0 0 0 0 1 -4.191 0 0 1 0 0 0 1 0 -4.219 0 0 1 0 0 0 1 1 -4.247 0 0 1 0 0 1 0 0 -4.275 0 0 1 0 0 1 0 1 -4.303 0 0 1 0 0 1 1 0 -4.331 0 0 1 0 0 1 1 1 -4.359 0 0 1 0 1 0 0 0 -4.388 0 0 1 0 1 0 0 1 -4.416 0 0 1 0 1 0 1 0 -4.444 0 0 1 0 1 0 1 1 -4.472 0 0 1 0 1 1 0 0 -4.500 0 0 1 0 1 1 0 1 -4.528 0 0 1 0 1 1 1 0 -4.556 0 0 1 0 1 1 1 1 -4.584 0 0 1 1 0 0 0 0 -4.613 0 0 1 1 0 0 0 1 -4.641 0 0 1 1 0 0 1 0 -4.669 0 0 1 1 0 0 1 1 -4.697 0 0 1 1 0 1 0 0 -4.725 0 0 1 1 0 1 0 1 -4.753 0 0 1 1 0 1 1 0 -4.781 0 0 1 1 0 1 1 1 -4.809 0 0 1 1 1 0 0 0 -4.838 0 0 1 1 1 0 0 1 -4.866 0 0 1 1 1 0 1 0 -4.894 0 0 1 1 1 0 1 1 -4.922 0 0 1 1 1 1 0 0 -4.950 0 0 1 1 1 1 0 1 -4.978 0 0 1 1 1 1 1 0 -5.006 0 0 1 1 1 1 1 1 -5.034 0 1 0 0 0 0 0 0 -5.063 0 1 0 0 0 0 0 1 -5.091 0 1 0 0 0 0 1 0 -5.119 01000011 ~ 01111110 inhibit 0 1 1 1 1 1 1 1 vsn 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz vrmp[5:0]: the positive polarity gamma amplitude voltage setti ng (vspr-vgsp). vrmp[5:0] vspr-vgsp 0 0 0 0 0 0 2.588 0 0 0 0 0 1 2.644 0 0 0 0 1 0 2.700 0 0 0 0 1 1 2.756 0 0 0 1 0 0 2.813 0 0 0 1 0 1 2.869 0 0 0 1 1 0 2.925 0 0 0 1 1 1 2.981 0 0 1 0 0 0 3.038 0 0 1 0 0 1 3.094 0 0 1 0 1 0 3.150 0 0 1 0 1 1 3.206 0 0 1 1 0 0 3.263 0 0 1 1 0 1 3.319 0 0 1 1 1 0 3.375 0 0 1 1 1 1 3.431 0 1 0 0 0 0 3.488 0 1 0 0 0 1 3.544 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.210- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 1 0 0 1 0 3.600 0 1 0 0 1 1 3.656 0 1 0 1 0 0 3.713 0 1 0 1 0 1 3.769 0 1 0 1 1 0 3.825 0 1 0 1 1 1 3.881 0 1 1 0 0 0 3.938 0 1 1 0 0 1 3.994 0 1 1 0 1 0 4.050 0 1 1 0 1 1 4.106 0 1 1 1 0 0 4.163 0 1 1 1 0 1 4.219 0 1 1 1 1 0 4.275 0 1 1 1 1 1 4.331 1 0 0 0 0 0 4.388 1 0 0 0 0 1 4.444 1 0 0 0 1 0 4.500 1 0 0 0 1 1 4.556 1 0 0 1 0 0 4.613 1 0 0 1 0 1 4.669 1 0 0 1 1 0 4.725 1 0 0 1 1 1 4.781 1 0 1 0 0 0 4.838 1 0 1 0 0 1 4.894 1 0 1 0 1 0 4.950 1 0 1 0 1 1 5.006 1 0 1 1 0 0 5.063 1 0 1 1 0 1 5.119 1 0 1 1 1 0 inhibit ????? inhibit 1 1 1 1 1 0 inhibit 1 1 1 1 1 1 vspr(vgsp=vssa) vrmn[5:0]: the negitive polarity gamma amplitude voltage setti ng (vsnr-vgsn). vrmn[5:0] vsnr-vgsn 0 0 0 0 0 0 -2.588 0 0 0 0 0 1 -2.644 0 0 0 0 1 0 -2.700 0 0 0 0 1 1 -2.756 0 0 0 1 0 0 -2.813 0 0 0 1 0 1 -2.869 0 0 0 1 1 0 -2.925 0 0 0 1 1 1 -2.981 0 0 1 0 0 0 -3.038 0 0 1 0 0 1 -3.094 0 0 1 0 1 0 -3.150 0 0 1 0 1 1 -3.206 0 0 1 1 0 0 -3.263 0 0 1 1 0 1 -3.319 0 0 1 1 1 0 -3.375 0 0 1 1 1 1 -3.431 0 1 0 0 0 0 -3.488 0 1 0 0 0 1 -3.544 0 1 0 0 1 0 -3.600 0 1 0 0 1 1 -3.656 0 1 0 1 0 0 -3.713 0 1 0 1 0 1 -3.769 0 1 0 1 1 0 -3.825 0 1 0 1 1 1 -3.881 0 1 1 0 0 0 -3.938 0 1 1 0 0 1 -3.994 0 1 1 0 1 0 -4.050 0 1 1 0 1 1 -4.106 0 1 1 1 0 0 -4.163 0 1 1 1 0 1 -4.219 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.211- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 1 1 1 1 0 -4.275 0 1 1 1 1 1 -4.331 1 0 0 0 0 0 -4.388 1 0 0 0 0 1 -4.444 1 0 0 0 1 0 -4.500 1 0 0 0 1 1 -4.556 1 0 0 1 0 0 -4.613 1 0 0 1 0 1 -4.669 1 0 0 1 1 0 -4.725 1 0 0 1 1 1 -4.781 1 0 1 0 0 0 -4.838 1 0 1 0 0 1 -4.894 1 0 1 0 1 0 -4.950 1 0 1 0 1 1 -5.006 1 0 1 1 0 0 -5.063 1 0 1 1 0 1 -5.119 1 0 1 1 1 0 inhibit ????? inhibit 1 1 1 1 1 0 inhibit 1 1 1 1 1 1 vsnr(vgsn=vssa) apf_en: abnormal power-off detection enable. dd_tu: in-house function, and not open. vpnl_en: enable vpnl function. pccs[1:0]: select the vsp/vsn bumping method as listed below pccs1 pccs0 driving mode 0 0 inhibit 0 1 inhibit 1 0 internal charge pump mode 1 1 external charge pump mode (use hx5186-a) dc86_div[3:0]: frequency for charge pump mode (hx5186-a) frequency dc86_div[3:0] external charge pump mode (hx5186-a) internal charge pump mode 000 fosc/8 fosc/8 0001 fosc/16 fosc/16 0010 fosc/32 fosc/32 0011 fosc/64 fosc/64 0100 fosc/96 fosc/96 0101 fosc/128 fosc/128 0110 fosc/160 fosc/160 0111 fosc/192 fosc/192 1000 fosc/224 fosc/224 1001 fosc/256 fosc/256 1010 fosc/288 fosc/288 1011 fosc/320 fosc/320 1100 fosc/352 fosc/352 1101 fosc/384 fosc/384 1110 fosc/416 fosc/512 1111 fosc/448 fosc/1024 xdk[1:0]: setting charge pump mode of internal / external ch arge pump. xdk[1] xdk[0] external charge pump internal charge pump 0 0 x1.5 pump x1.5 pump 0 1 x2 pump x2 pump 1 0 x3 pump x3 pump 1 1 inhibited x2.5 pump auto_xdk: auto xdk function enable of internal / external cha rge pump. auto_xdk=1 charge pump mode ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.212- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 vdd3 x 1.5 > vsptarget x1.5 vdd3 x 2 > vsptarget x2 vdd3 x 2 < vsptarget x3 auto_xdk=0 depend on xdk[2:0] restriction setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset vsn_en=0, vsp_en=0, vgl_en=0, vgh_en=0, vcl_en=0, vdddn_hz=0, stb=1, dstb=0, fs1[2:0]=100, ap[2:0]=100, vghs[3 :0]=0111, vgls[3 :0]=0111, dt[1:0] =00, btp[4:0]=10001, btn[4:0]=10001, vrhp[7:0]=0x36h, vrhn[7:0]=0x30h, vrmp[5:0]=0x2bh, vrmn[5:0]=0x24h, apf_en=1, dd_tu= 0, vpnl_en=0, pccs[1 :0]=10, dc86_div[3:0]=1000, xdk1=1, xdk0=0, auto_xdk=0 fs1[2:0], ap[2:0], vghs[3 :0], vgls[3 :0], dstb, dt[1:0], btp[4:0], btn[4:0], vrhp[7:0], vrhn[7:0], vrmp[5:0], vrmn[5:0], apf_en, dd_tu, vpnl_en, pccs[1 :0], dc86_div[3:0], xdk1, xdk0, auto_xdk, ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.213- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.56 setdisp: set display related register (b2h) setdisp( set display related register) b2h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 1 0 b2 1 st parameter 1 1 - - - - - gon dte d[1:0] 2 nd parameter 1 1 - nl[7:0] 3 rd parameter bp [7:0] 4 th parameter 1 1 - fp [7:0] 5 th parameter 1 1 rtn[7:0] 6 th parameter 1 1 - sap[3:0] init_dis init_set[2:0] 7 th parameter 1 1 - gen_on[7:0] 8 th parameter 1 1 - gen_off[7:0] 9 th parameter 1 1 - bp_pe[7:0] 10 th parameter 1 1 - fp_pe[7:0] 11 th parameter 1 1 - rtn_pe[7:0] 12 th parameter 1 1 - - res_sel[2:0] - - tgs[1:0] description this command is used to set display related registe r d1C0: setting source driver output d1 d0 source output HX8392-A internal display operations 0 0 vssd halt 0 1 inhibit inhibit 1 0 v255 operate 1 1 display operate if send display on command(29h), d[1:0] will set11 by ic internal circuit. if send display off command(28h), d[1:0] will set 10 by ic internal circuit. if send sleep in command(10h), d[1:0] will set 00 by ic internal circuit. gon, dte: setting gate driver output gon dte gate output 0 x inhibit 1 0 vgl 1 1 vgh/vgl if send sleep out command(11h), gon, dte will set1 1 by ic internal circuit. if send sleep in command(10h), gon, dte will set 1 0 by ic internal circuit. fp[7:0]: specify the amount of scan line for front porch (fp ). bp[7:0] : specify the amount of scan line for back porch(bp) . fp_pe[7:0]: specify the amount of scan line for front porch (fp ) on partial idle mode. bp_pe[7:0] : specify the amount of scan line for back porch(bp) on partial idle mode. fp[7:0] / fp_pe[7:0] bp[7:0] / bp_pe[7:0] number of fp line number of bp line 8h00 inhibit 8h01 3 lines 8h02 4 lines 8h03 5 lines 8h04 6 lines 8h05 7 lines ??? ??? 8hfb 253 lines 8hfc 254 lines 8hfd 255 lines 8hfe 256 lines 8hff 257 lines ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.214- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 sap[3:0]: set current of operational amplifier sap3 sap2 sap1 sap0 fixed current of operational amplifier 0 0 0 0 1 * iref 0 0 0 1 2 * iref 0 0 1 0 3 * iref 0 0 1 1 4 * iref 0 1 0 0 5 * iref 0 1 0 1 6 * iref 0 1 1 0 7 * iref 0 1 1 1 8 * iref ???????????? 1 1 1 1 16 * iref init_disp: internal used, not open. please set 0. init_set[2:0]: init pulse width init_set[2:0] init pulse width 000 1ms 001 2ms 010 3ms 011 4ms 100 5ms othet setting inhibit gen_on[7:0]: gamma op turned on timing and in-house function not open. gen_off[7:0]: gamma op turned off timing and in-hou se function not open. rtn[7:0]: a cycle time of line width, in-house func tion not open. rtn_pe[7:0]: a cycle time of line width on partial idle mode, in-house function not open. rtn[7:0]/ rtn_pe[7:0] clock per line 8h00 600 clocks 8h01 604 clocks 8h02 608 clocks 8h03 612 clocks ??? ??? 8hfd 1612 clocks 8hfe 1616 clocks 8hff 1620 clocks nl[7:0]: sets the number of lines to drive the lcd at an int erval of 4 lines. the gram address mapping is not affected by the number of lines set by nl[7:0]. the number of lines must be the same or more than the number of lines necessary for the size of the liquid crystal panel. nl[7:0] line 0 0 0 0 0 0 0 0 480 0 0 0 0 0 0 0 1 484 0 0 0 0 0 0 1 0 488 0 0 0 0 0 0 1 1 492 .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. 1 1 0 1 1 1 0 0 1360 1 1 0 1 1 1 0 1 1364 1 1 0 1 1 1 1 0 1368 1 1 0 1 1 1 1 1 inhibit .. .. .. .. .. .. .. .. .. 1 1 1 1 1 1 1 1 inhibit note: 1. if nl[7:0] > 130, only support dsi video m ode. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.215- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 tgs[1:0]: source switch sequence select. tgs1 tgs0 tg sequence 0 0 sw1 ? sw2 ? sw3 0 1 sw2 ? sw3 ? sw1 1 0 sw2 ? sw1 ? sw3 1 1 sw3 ? sw1 ? sw2 res_sel[2:0]: panel resolution select res_sel[2:0] resolution source channels 000 800rgbx1280 dot s1 ~ s800 001 768rgbx1280 dot s1 ~ s384, s417~s800 010 720rgbx1280 dot s1 ~ s360, s441~s800 011 600rgbx1024 dot s1 ~ s300, s501~s800 restrictions setextc turn on to enable this comman d register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset gon=1, det=0, d[1:0]=00, bp[7:0]=0x00h, fp[7:0]=0x00h, rtn[7:0]=0x05h, sap[3:0]=0111, gen_on=0x00h, gen_off=0xffh, bp_pe[7:0]=0x00h, fp_pe[7:0]=0x00h, rtn_pe[7:0]=0x05h, nl[7:0]=0xc8h, res_sel[2:0]=010, tgs[1:0]=00 bp[7:0], fp[7:0], sap[3:0], gen_on[7:0], gen_off[7:0], rtn[7:0], bp_pe[7:0], fp_pe[7:0], rtn_pe[7:0], nl[7:0], res_sel[2:0], tgs[1:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.216- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.57 setrgbif: set rgb interface related register (b3h) setrgbif( set rgb interface related register) b3h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 1 1 b3 1 st parameter 1 1 - - - - - dpl hspl vspl epl - description this command is used to set rgb interface related re gister. epl: specify the polarity of enable pin in rgb interface mode. epl enable pin display 0 0 enable 0 1 disable 1 0 disable 1 1 enable vspl: the polarity of vs pin. when vspl=0, the vs pin is low active. when vspl=1, the vs pin is high active. hspl: the polarity of hs pin. when hspl=0, the hs pin is low active. when hspl=1, the hs pin is high active. dpl: the polarity of dck pin. when dpl=0, the data is re ad on the rising edge of dck signal. when dpl=1, the data is read on the falling edge of dck signal. restrictions setextc turn on to enable this comman d. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset dpl=0,hspl=0,vspl=0,epl=1 dpl,hspl,vspl,epl ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.217- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.58 setmpucyc: set mpu/command mode panel drivin g timing(rb4h) setmpucyc(set mpu/command mode panel driving timing ) b4h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 1 0 0 b4 1st parameter 1 1 - - - nw_pe[2:0] nw[2:0] - 2nd parameter - - - - shr[11:8] 3rd parameter 1 1 - shr[7:0] - 4th parameter 1 1 - spon[7:0] - 5th parameter 1 1 - spoff[7:0] - 6th parameter 1 1 - chr[7:0] - 7th parameter 1 1 - con[7:0] 8th parameter 1 1 - coff[7:0] - 9th parameter 1 1 - shp[3:0] - - - - 10th parameter 1 1 - chp[3:0] ccp[3:0] - 11th parameter 1 1 - n_t1[7:0] - 12th parameter 1 1 - n_t2[7:0] - 13th parameter 1 1 - n_t3[7:0] - 14th parameter 1 1 - n_t4[7:0] - 15th parameter 1 1 - n_t5[7:0] - 16th parameter 1 1 - n_t6[7:0] - 17th parameter 1 1 - n_t7[7:0] - 18th parameter 1 1 - n_t8[7:0] - 19th parameter 1 1 - n_t9[7:0] - 20th parameter 1 1 - - - - - eot[3:0] - description this command is used to get setting of display wavef orm cycles for mpu mode or command mode. nw[2:0] : inversion type setting. nw_pe[2:0] : inversion type setting on partial idle mode. nw2 nw1 nw0 inversion type 0 0 0 column inversion 0 0 1 1-dot inversion 0 1 0 2-dot inversion 0 1 1 4-dot inversion 1 0 0 inhibit 1 0 1 inhibit 1 1 0 inhibit 1 1 1 inhibit shr[11:0]: gsp hsync rise. shr_0[7:0] start pulse output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xffeh 1022 x hsync 0xfffh 1023 x hsync spon[7:0]: gsp pulse delay. spon[7:0] start pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.218- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0xfeh 1016 osc clk 0xffh 1020 osc clk note: 1. spon[7:0] < spoff rtn[7:0] spoff[7:0]: gsp pulse width. spon[7:0] start pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 x osc clk 0xffh 1020 x osc clk note: 1. spon[7:0] < spoff rtn[7:0] shp[3:0]: width of gsp high pulse. shp3 shp2 shp1 shp0 start pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync chr[7:0]: ck hsync rise. chr[7:0] ck pulse start output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xfeh 510 x hsync 0xffh 511 x hsync con[7:0]: ck pulse delay. con[7:0] ck pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 osc clk 0xffh 1020 osc clk note: 1. con[7:0] < coff rtn[7:0] coff[7:0]: ck pulse width. coff[7:0] ck pulse output 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.219- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0xffh 1020 osc clk note: 1. con[7:0] < coff rtn[7:0] chp[3:0]: width of ck high pulse. chp3 chp2 chp1 chp0 ck pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync ccp[3:0]: a cycle of ck pulse. ccp3 ccp2 ccp1 ccp0 ck pulse cycle 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync n_t1[7:0]: the timing definition of t1. n_t1[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t2[7:0]: the timing definition of t2. n_t2[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t3[7:0]: the timing definition of t3. n_t3[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.220- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t4[7:0]: the timing definition of t4. n_t4[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t5[7:0]: the timing definition of t5. n_t5[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t6[7:0]: the timing definition of t6. n_t6[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t7[7:0] : the timing definition of t7. n_t1[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.221- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 n_t8[7:0]: the timing definition of t8. n_t8[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t9[7:0]: the timing definition of t9. n_t9[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk eqt[3:0]: equalizing period of tg output eqt3 eqt2 eqt1 eqt0 clock cycles 0 0 0 0 0 0 0 0 1 4 0 0 1 0 8 0 0 1 1 12 0 1 0 0 16 0 1 0 1 20 0 1 1 0 24 0 1 1 1 28 1 0 0 0 32 1 0 0 1 36 1 0 1 0 40 1 0 1 1 44 1 1 0 0 48 1 1 0 1 52 1 1 1 0 56 1 1 1 1 60 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.222- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 restrictions - register availability default flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.223- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.59 setvcom: set vcom voltage (b6h) setvcom ( set vcom voltage) b6 h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 1 1 0 b6 1 st parameter 1 1 - vcmc[7:0] - description this command is used to set vcom voltage. vcmc[7:0]: dc vcom voltage setting for forward scan. vcmc[7:0] d7 d6 d5 d4 d3 d2 d1 d0 vcom (v) 0 0 0 0 0 0 0 0 -2 0 0 0 0 0 0 0 1 -1.984 0 0 0 0 0 0 1 0 -1.968 0 0 0 0 0 0 1 1 -1.952 0 0 0 0 0 1 0 0 -1.936 0 0 0 0 0 1 0 1 -1.92 0 0 0 0 0 1 1 0 -1.904 0 0 0 0 0 1 1 1 -1.888 0 0 0 0 1 0 0 0 -1.872 0 0 0 0 1 0 0 1 -1.856 0 0 0 0 1 0 1 0 -1.84 0 0 0 0 1 0 1 1 -1.824 0 0 0 0 1 1 0 0 -1.808 0 0 0 0 1 1 0 1 -1.792 0 0 0 0 1 1 1 0 -1.776 0 0 0 0 1 1 1 1 -1.76 0 0 0 1 0 0 0 0 -1.744 0 0 0 1 0 0 0 1 -1.728 0 0 0 1 0 0 1 0 -1.712 0 0 0 1 0 0 1 1 -1.696 0 0 0 1 0 1 0 0 -1.68 0 0 0 1 0 1 0 1 -1.664 0 0 0 1 0 1 1 0 -1.648 0 0 0 1 0 1 1 1 -1.632 0 0 0 1 1 0 0 0 -1.616 0 0 0 1 1 0 0 1 -1.6 0 0 0 1 1 0 1 0 -1.584 0 0 0 1 1 0 1 1 -1.568 0 0 0 1 1 1 0 0 -1.552 0 0 0 1 1 1 0 1 -1.536 0 0 0 1 1 1 1 0 -1.52 0 0 0 1 1 1 1 1 -1.504 0 0 1 0 0 0 0 0 -1.488 0 0 1 0 0 0 0 1 -1.472 0 0 1 0 0 0 1 0 -1.456 0 0 1 0 0 0 1 1 -1.44 0 0 1 0 0 1 0 0 -1.424 0 0 1 0 0 1 0 1 -1.408 0 0 1 0 0 1 1 0 -1.392 0 0 1 0 0 1 1 1 -1.376 0 0 1 0 1 0 0 0 -1.36 0 0 1 0 1 0 0 1 -1.344 0 0 1 0 1 0 1 0 -1.328 0 0 1 0 1 0 1 1 -1.312 0 0 1 0 1 1 0 0 -1.296 0 0 1 0 1 1 0 1 -1.28 0 0 1 0 1 1 1 0 -1.264 0 0 1 0 1 1 1 1 -1.248 0 0 1 1 0 0 0 0 -1.232 0 0 1 1 0 0 0 1 -1.216 0 0 1 1 0 0 1 0 -1.2 0 0 1 1 0 0 1 1 -1.184 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.224- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 0 1 1 0 1 0 0 -1.168 0 0 1 1 0 1 0 1 -1.152 0 0 1 1 0 1 1 0 -1.136 0 0 1 1 0 1 1 1 -1.12 0 0 1 1 1 0 0 0 -1.104 0 0 1 1 1 0 0 1 -1.088 0 0 1 1 1 0 1 0 -1.072 0 0 1 1 1 0 1 1 -1.056 0 0 1 1 1 1 0 0 -1.04 0 0 1 1 1 1 0 1 -1.024 0 0 1 1 1 1 1 0 -1.008 0 0 1 1 1 1 1 1 -0.992 0 1 0 0 0 0 0 0 -0.976 0 1 0 0 0 0 0 1 -0.96 0 1 0 0 0 0 1 0 -0.944 0 1 0 0 0 0 1 1 -0.928 0 1 0 0 0 1 0 0 -0.912 0 1 0 0 0 1 0 1 -0.896 0 1 0 0 0 1 1 0 -0.88 0 1 0 0 0 1 1 1 -0.864 0 1 0 0 1 0 0 0 -0.848 0 1 0 0 1 0 0 1 -0.832 0 1 0 0 1 0 1 0 -0.816 0 1 0 0 1 0 1 1 -0.8 0 1 0 0 1 1 0 0 -0.784 0 1 0 0 1 1 0 1 -0.768 0 1 0 0 1 1 1 0 -0.752 0 1 0 0 1 1 1 1 -0.736 0 1 0 1 0 0 0 0 -0.72 0 1 0 1 0 0 0 1 -0.704 0 1 0 1 0 0 1 0 -0.688 0 1 0 1 0 0 1 1 -0.672 0 1 0 1 0 1 0 0 -0.656 0 1 0 1 0 1 0 1 -0.64 0 1 0 1 0 1 1 0 -0.624 0 1 0 1 0 1 1 1 -0.608 0 1 0 1 1 0 0 0 -0.592 0 1 0 1 1 0 0 1 -0.576 0 1 0 1 1 0 1 0 -0.56 0 1 0 1 1 0 1 1 -0.544 0 1 0 1 1 1 0 0 -0.528 0 1 0 1 1 1 0 1 -0.512 0 1 0 1 1 1 1 0 -0.496 0 1 0 1 1 1 1 1 -0.48 0 1 1 0 0 0 0 0 -0.464 0 1 1 0 0 0 0 1 -0.448 0 1 1 0 0 0 1 0 -0.432 0 1 1 0 0 0 1 1 -0.416 0 1 1 0 0 1 0 0 -0.4 0 1 1 0 0 1 0 1 -0.384 0 1 1 0 0 1 1 0 -0.368 0 1 1 0 0 1 1 1 -0.352 0 1 1 0 1 0 0 0 -0.336 0 1 1 0 1 0 0 1 -0.32 0 1 1 0 1 0 1 0 -0.304 0 1 1 0 1 0 1 1 -0.288 0 1 1 0 1 1 0 0 -0.272 0 1 1 0 1 1 0 1 -0.256 0 1 1 0 1 1 1 0 -0.24 0 1 1 0 1 1 1 1 -0.224 0 1 1 1 0 0 0 0 -0.208 0 1 1 1 0 0 0 1 -0.192 0 1 1 1 0 0 1 0 -0.176 0 1 1 1 0 0 1 1 -0.16 0 1 1 1 0 1 0 0 -0.144 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.225- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 1 1 1 0 1 0 1 -0.128 0 1 1 1 0 1 1 0 -0.112 0 1 1 1 0 1 1 1 -0.096 0 1 1 1 1 0 0 0 -0.08 0 1 1 1 1 0 0 1 -0.064 0 1 1 1 1 0 1 0 -0.048 0 1 1 1 1 0 1 1 -0.032 0 1 1 1 1 1 0 0 -0.016 01111101 inhibit 0 1 1 1 1 1 1 0 vcomr 0 1 1 1 1 1 1 1 vssa 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz restrictions setextc turn on to enable this comman d. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset vcmc[7:0]=0x5eh vcmc[7:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.226- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.60 sette: set internal te function (b7h) sette ( set internal te function) b7h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 1 1 1 b7 1 st parameter 1 1 - - - - - tei[3:0] 2 nd parameter 1 1 - - - - - - tep[10:8] 3 rd parameter 1 1 - tep[7:0] - description tei[3:0]: sets the output interval of te signal according to the display data rewrite cycle and data transfer rate. tei3 tei2 tei1 tei0 output interval 0 0 0 0 1 frame 0 0 0 1 2 frames 0 0 1 0 3 frames ??????? ?? 1 1 1 0 15 frames 1 1 1 1 16 frames tep[10:0]: sets the output position of frame cycle signal. te can be used as the trigger signal for frame synchronous write operation. make sure the setting restriction 11h000 tep[10:0] numbers of line-1. tep[10:0] output position 000h 0th line 001h 1st line 002h 2nd line 003h 3rd line ??? ??? 556h 1366th line 557h 1367th line 558h 1368th line restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset tei[3:0]=0000, tep[10:0]= 0x000h tei[3:0], tep[9:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.227- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.61 setextc: set extension command (b9h) setextc ( set extended command set) b9h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 1 0 0 1 b9 1 st parameter 1 1 - extc1[7:0] ff 2 nd parameter 1 1 - extc2[7:0] 83 3 rd parameter 1 1 - extc3[7:0] 92 description this command is used to set extended command set ac cess enable. extend cmd command description enable after command (b9h), must write 3 parameters (ffh,83h,92h) by order disable(default) after command(b9h), write 3 parameters (xxh,xxh,xxh ) any value is all right, but can not be (ffh,83h,92h ) restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset extc1[7:0]=0x00h, extc2[7:0]=0x00h, extc3[7:0]=0x00h, n/a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.228- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.62 setmipi: (bah) setmipi ( set extended command set) bah dnc nrd nwr d15~d 8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 0 1 0 ba 1 st parameter 1 1 - 0 0 0 tx_ osc 0 0 lan_num [1:0] - 2 nd parameter 1 1 - 1 0 0 0 0 0 tx_delay[1:0] - description this command is used to set dsi i/f setting. lan_num[1:0]: data lane number of dsi interface lan_num[1:0] lane number used dsi data lane 00 1 hs_d0p/n 01 2 hs_d0p/n, hs_d1p/n 10 3 hs_d0p/n, hs_d1p/n, hs_d2p/n 11 4 hs_d0p/n, hs_d1p/n, hs_d2p/n, hs_d3p/n tx_osc: select low power transmitter oscillator. tx_osc oscillator frequency 0 12mhz 1 6mhz tx_delay[1:0]: set dsi tx output delay time. tx_delay[1:0] delay cycle(t lpx ) 00 inhibit 01 3~5 10 5~7 11 7~9 restrictions setextc turn on to enable this command . register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset lan_num[1:0]=01 tx_osc=0, tx_delay[1:0]=10 lan_num[1:0], tx_osc, tx_delay[1:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.229- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.63 setotp: set otp (bbh) setotp( set otp related setting) bbh dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 1 0 1 1 bb 1 st parameter 1 1 - otp_mask[7:0] (8'b0) - 2 nd parameter 1 1 - - - - - - - otp_index[9:8] - 3 rd parameter 1 1 - otp_index[7:0] - 4 th parameter 1 1 - otp_load_ disable otp_test otp_por otp_pwe otp_ptm[1:0] otp_pwr_sel otp_prog - 5 th parameter 1 1 - otp_data[7:0] - description this command is used to set otp related setting. otp_mask[7:0]: bit programming mask, if 1, means this bit cant be programmed. otp_index[7:0]: set index of otp table for programming. otp_index[9:8]: for farther use. the register value should be 0. no t open. otp_pwe: otp program write enable, if 1, means otp is able t o be programmed. otp_prog: when set to 1, the register content of otp index is programmed. otp_load_disable : normally the internal registers are auto-loaded f rom otp when the slpout command is received. nevertheless, if this bit is s et to 1, it will disable the auto loading function when the slpout command was received. in general, this b it is used when otp is not yet programmed. otp_ptm[1:0] : not open, internal use. otp_pwr_sel: when written to 1, otp_pwr voltage is fed to otp otp_data[7:0]: read back the otp index data. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset otp_mask[7:0]=0x00h, otp_index[9:0]=0x03bh, otp_load_disable=0, otp_test=0, otp_por=0, otp_pwe=0, otp_ptm[1:0]=00, otp_pwr_sel=0, otp_prog=0, otp_data[7:0]=xxh n/a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.230- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.64 setptba: set internal power(bfh) setptba ( set internal power) bfh dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 1 1 1 1 bf 1 st parameter 1 1 - 0 0 0 0 0 1 0 1 05 2 nd parameter 1 1 - ptba[23:16] 60 3 rd parameter 1 1 - ptba[15:8] - 4 th parameter 1 1 - ptba[7:0] 00 description ptba[23:16]: internal use, not open. please set 0x60. ptba[15:11]: internal use, not open. please set 00000 ptba[10:9]: set regulated current source. ptba[10:9] level 00 inhibit 01 small 10 middle 11 large ptba[8]: internal use, not open. please set 0. ptba[7:0]: internal use, not open. please set 0x00. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset ptba[23:16]=0x60h, ptba[15:8]=0x04h, ptba[7:0]=0x00h, - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.231- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.65 setdsimo: set display mode (c2h) setrgbif( set rgb interface related register) c2h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 0 0 1 0 c2 1 st parameter 1 1 - - - - - rm - dm[1:0] - description this command is used to set display source and mode related register rm the bit is used to enable or disable for the frame memory access operation. rm setting is enabled from the next frame of video mode. wait 1 frame to transfer data after setting . rm gram access 0 disable 1 enable dm[1:0] the bit is used to select display operation mode. the setting allows switching between display operation in synchronization with internal oscillation clock, vsync, vsync+hsync. note that switching between vsync and display opera tion is prohibited. dm 1 dm 0 display mode 0 0 internal oscillation clock 0 1 vsync+hsync 1 0 vsync signal 1 1 video mode display data bypass gram mode restrictions setextc turn on to enable this comman d. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset rm=0, dm[1:0]=00 rm, dm[1:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.232- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.66 setid: set id (c3h) setid ( set id) c3h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 0 0 1 1 c3 1 st parameter 1 1 - id1[7:0] - 2 nd parameter 1 1 - id2[7:0] - 3 rd parameter 1 1 - id3[7:0] - description this command is used to set id (rdah, rdbh, rdch) v alue. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset id1[7:0]=0x00h, id2[7:0]=0x00h, id3[7:0]=0x00h, id1[7:0], id2[7:0], id3[7:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.233- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.67 setddb: set ddb (c4h) setddb ( set ddb) c4h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 0 1 0 0 c4 1 st parameter 1 1 - ddb1[7:0](8'b0) - 2 nd parameter 1 1 - ddb2[7:0](8'b0) - 3 rd parameter 1 1 - ddb3[7:0](8'b0) - 4 th parameter 1 1 - ddb4[7:0](8'b0) - description this command is used to set a1h ddb1~4 value. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset ddb1[7:0]=0x00h, ddb2[7:0]=0x00h, ddb3[7:0]=0x00h, ddb4[7:0]=0x00h ddb1[7:0], ddb2[7:0], ddb3[7:0], ddb4[7:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.234- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.68 setcabc: set cabc control (c9h) setcabc (set cabc control) c9h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 0 0 1 c9 1 st parameter 1 1 - - sel_pwmclk[2:0] sel_gain[1:0] invp uls sel_ bldu ty (depen d on osc speed) 2 nd parameter 1 1 - pwm_period[7:0] - 3 rd parameter 1 1 - cabc _fsy nc dim_frame[6:0] - 4 th parameter 1 1 - cabc_step[7:0] - 5 th parameter 1 1 - cabc_clken[7:0] - 6 th parameter 1 1 - cabc _dd savepower[6:0] - 7 th parameter 1 1 - mean_offset[7:0] 8 th parameter 1 1 - - - - - cabc_flm[3:0] 9 th parameter 1 1 - - - en_di m_mix en_co st_me an en_c ost en_n ln_g ain en_j udge en_t emp description this command is used to set cabc parameter. invpuls: the backlight pwm output polarity select. 0, the backlight pwm output is low level active. 1, the backlight pwm output is high level active. sel_blduty: the backlight pwm output duty on/off control when cabc operated. 0, the backlight pwm output duty is 100%. 1, the backlight pwm output duty is calculated from cabc o peration. sel_pwmclk[2:0] : internal pwm_clk divider for cabc clock. sel_pwmclk[2:0]/ dc_div1/ dc_div0 brightness control clock 0 0 0 pwm_clk / 1 0 0 1 pwm_clk / 2 0 1 0 pwm_clk / 4 0 1 1 pwm_clk / 8 1 0 0 pwm_clk / 16 1 0 1 pwm_clk / 32 1 1 0 pwm_clk / 64 1 1 1 pwm_clk / 128 note: pwm_clk = osc frequency / 4 pwm_period[7:0] : the backlight pwm output period setting. backlight pwm output period = 1 / (pwm_clk / clock divider (sel_pwmclk )) x (255x(pwm_period[7:0])). cabc_fsync: pwm output synchronize to vsync. savepower[6:0] : minimum cabc gain / maximum cabc duty output selec t. savepower [6:0] min. gain max. duty 0 0 x x x x x reserve 0 1 0 0 0 0 0 1+0/32 100% 0 1 0 0 0 0 1 1+1/32 96.97% 0 1 0 0 0 1 0 1+2/32 94.12% 0 1 0 0 0 1 1 1+3/32 91.43% 0 1 0 0 1 0 0 1+4/32 88.89% 0 1 0 0 1 0 1 1+5/32 86.49% 0 1 0 0 1 1 0 1+6/32 84.21% 0 1 0 0 1 1 1 1+7/32 82.05% ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.235- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0 1 0 1 0 0 0 1+8/32 80% 0 1 0 1 0 0 1 1+9/32 78.05% 0 1 0 1 0 1 0 1+10/32 76.19% 0 1 0 1 0 1 1 1+11/32 74.42% 0 1 0 1 1 0 0 1+12/32 72.73% 0 1 0 1 1 0 1 1+13/32 71.11% 0 1 0 1 1 1 0 1+14/32 69.57% 0 1 0 1 1 1 1 1+15/32 68.09% 0 1 1 0 0 0 0 1+16/32 66.67% 0 1 1 0 0 0 1 1+17/32 65.31% 0 1 1 0 0 1 0 1+18/32 64% 0 1 1 0 0 1 1 1+19/32 62.75% 0 1 1 0 1 0 0 1+20/32 61.54% 0 1 1 0 1 0 1 1+21/32 60.38% 0 1 1 0 1 1 0 1+22/32 59.26% 0 1 1 0 1 1 1 1+23/32 58.18% 0 1 1 1 0 0 0 1+24/32 57.14% 0 1 1 1 0 0 1 1+25/32 56.14% 0 1 1 1 0 1 0 1+26/32 55.17% 0 1 1 1 0 1 1 1+27/32 54.24% 0 1 1 1 1 0 0 1+28/32 53.33% 0 1 1 1 1 0 1 1+29/32 52.46% 0 1 1 1 1 1 0 1+30/32 51.61% 0 1 1 1 1 1 1 1+31/32 50.79% 1 0 0 0 0 0 0 1+32/32 50% for details, please refer to chapter 5.14 cabc blo ck. cabc_flm[3:0]: cabc dimming frame number for each step. cabc_dd_s: cabc dimming function enable bit.(still mode) 0, disable cabc dimming. 1 , enable cabc dimming. cabc_dd_m: cabc dimming function enable bit.(moving mode) 0, disable cabc dimming. 1 , enable cabc dimming. cabc_dd_u: cabc dimming function enable bit.(user interface m ode) 0, disable cabc dimming. 1 , enable cabc dimming. sel_gain[1:0]: cabc gain select. (not open) invpuls: the backlight pwm output polarity select. (not open) en_dix_mix: (not open) en_cost: cost adjust enable bit. (not open) en_cost_mean: (not open) en_nln_gain: non-linear gain enable bit. (not open) en_judge: (not open) en_temp: temporal weighting enable bit. (not open) dim_frame[6:0] : manual brightness setting dimming period. (not open) mean_offset[7:0]: increase calculated frame mean. (not open) cabc_step[7:0]: (not open) cabc_clken[7:0]: (not open) cabc_fsync: (not open) restriction setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.236- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 default status default value otp value power on sequence s/w reset h/w reset en_dim_mix=1,en_cost_ mean=1,en_cost=1 en_nln_gain=1, en_judge=1,en_temp=0, cabc_dd=0, savepower[6:0]=0x00h, mean_offset[7:0]=0x00h, cabc_flm[3:0]=4b0001, sel_pwmclk[2:0]=3b010, sel_gain[1:0]=2b11, cabc_fsync=0, invpuls=1,sel_blduty=1, pwm_period[7:0]=0x2bh, dim_frame[6:0]=0x1eh, cabc_step[7:0]=0x1eh, cabc_clken[7:0]=0x00h cabc_dd, savepower[6:0], sel_pwmclk[2:0], sel_gain[1:0], cabc_fsync, invpuls, sel_blduty, pwm_period[7:0], dim_frame[6:0], cabc_step[7:0], cabc_clken[7:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.237- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.69 setcabcgain (cah) setcabcgain cah dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 0 1 0 ca 1 st parameter 1 1 - 0 dbg0[6:0] - 2 nd parameter 1 1 - 0 dbg1[6:0] - 3 rd parameter 1 1 - 0 dbg2[6:0] - 4 th parameter 1 1 - 0 dbg3[6:0] - 5 th parameter 1 1 - 0 dbg4[6:0] - 6 th parameter 1 1 - 0 dbg5[6:0] - 7 th parameter 1 1 - 0 dbg6[6:0] - 8 th parameter 1 1 - 0 dbg7[6:0] - 9 th parameter 1 1 - 0 dbg8[6:0] - description dbg0~8[6:0] : gain select register 0~8. dbg0~8[6:0] cabc gain cabc duty 0 0 x x x x x reserve 0 1 0 0 0 0 0 1+0/32 100% 0 1 0 0 0 0 1 1+1/32 96.97% 0 1 0 0 0 1 0 1+2/32 94.12% 0 1 0 0 0 1 1 1+3/32 91.43% 0 1 0 0 1 0 0 1+4/32 88.89% 0 1 0 0 1 0 1 1+5/32 86.49% 0 1 0 0 1 1 0 1+6/32 84.21% 0 1 0 0 1 1 1 1+7/32 82.05% 0 1 0 1 0 0 0 1+8/32 80% 0 1 0 1 0 0 1 1+9/32 78.05% 0 1 0 1 0 1 0 1+10/32 76.19% 0 1 0 1 0 1 1 1+11/32 74.42% 0 1 0 1 1 0 0 1+12/32 72.73% 0 1 0 1 1 0 1 1+13/32 71.11% 0 1 0 1 1 1 0 1+14/32 69.57% 0 1 0 1 1 1 1 1+15/32 68.09% 0 1 1 0 0 0 0 1+16/32 66.67% 0 1 1 0 0 0 1 1+17/32 65.31% 0 1 1 0 0 1 0 1+18/32 64% 0 1 1 0 0 1 1 1+19/32 62.75% 0 1 1 0 1 0 0 1+20/32 61.54% 0 1 1 0 1 0 1 1+21/32 60.38% 0 1 1 0 1 1 0 1+22/32 59.26% 0 1 1 0 1 1 1 1+23/32 58.18% 0 1 1 1 0 0 0 1+24/32 57.14% 0 1 1 1 0 0 1 1+25/32 56.14% 0 1 1 1 0 1 0 1+26/32 55.17% 0 1 1 1 0 1 1 1+27/32 54.24% 0 1 1 1 1 0 0 1+28/32 53.33% 0 1 1 1 1 0 1 1+29/32 52.46% 0 1 1 1 1 1 0 1+30/32 51.61% 0 1 1 1 1 1 1 1+31/32 50.79% 1 0 0 0 0 0 0 1+32/32 50% for details, please refer to chapter 5.14 cabc blo ck. restrictions setextc turn on to enable this comman d. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.238- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset dbg0[6:0]=0x40h, dbg1[6:0]=0x3ch, dbg2[6:0]=0x38h, dbg3[6:0]=0x34h, dbg4[6:0]=0x33h, dbg5[6:0]=0x32h, dbg6[6:0]=0x2bh, dbg7[6:0]=0x24h, dbg8[6:0]=0x22h dbg0[6:0], dbg1[6:0], dbg2[6:0], dbg3[6:0], dbg4[6:0], dbg5[6:0], dbg6[6:0], dbg7[6:0], dbg8[6:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.239- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.70 setpanel (cch) setpanel( set panel related register) cch dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 1 0 0 cc 1 st parameter 1 1 - - - - - ss_panel gs_panel rev_panel bgr_panel - description0 this command is used to set setting of panel related register and make panel module meets below spec from viewpoint of user bgr_panel : the order of -p.240- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.71 seteq (d4h) seteq( set eq function) d4h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 0 1 0 0 d4 1 st parameter 1 1 - - - - - eq_gr eq_gf - - - description0 this command is used to set setting of eq function for gate driver control signal . eq_gr: the bit is set rise time eq function. eq_gr eq of ris e time 0 enable 1 disable eq_gf: the bit is set fall time eq function. eq_gf eq of fall time 0 enable 1 disable restrictions setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset eq_gr= 1 , eq_gf= 1 - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.241- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.72 segckeq: set gck eq function (d5h) sette ( set internal te function) d5h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 0 1 0 1 d5 1 st parameter 1 1 - 0 0 0 0 0 0 0 0 00 2 nd parameter 1 1 - 0 0 0 0 0 0 0 0 00 3 rd parameter 1 1 - eq_delay[7:0] - description eq_delay[7:0]: the timing definition of gck eq. n_t9[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk note: 1. coff+ ( 2 x eq_delay) <= rtn setting restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset eq_delay[7:0]= 0x08h - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.242- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.73 setrgbcyc: set rgb/video mode panel driving timing(rd8h) setrgbcyc(set rgb/video mode panel driving timing) d8h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 0 0 0 eb 1st parameter 1 1 - - - nw_pe[2:0] nw[2:0] - 2nd parameter - - - - shr[11:8] 3rd parameter 1 1 - shr[7:0] - 4th parameter 1 1 - spon[7:0] - 5th parameter 1 1 - spoff[7:0] - 6th parameter 1 1 - chr[7:0] - 7th parameter 1 1 - con[7:0] 8th parameter 1 1 - coff[7:0] - 9th parameter 1 1 - shp[3:0] - - - - 10th parameter 1 1 - chp[3:0] ccp[3:0] - 11th parameter 1 1 - n_t1[7:0] - 12th parameter 1 1 - n_t2[7:0] - 13th parameter 1 1 - n_t3[7:0] - 14th parameter 1 1 - n_t4[7:0] - 15th parameter 1 1 - n_t5[7:0] - 16th parameter 1 1 - n_t6[7:0] - 17th parameter 1 1 - n_t7[7:0] - 18th parameter 1 1 - n_t8[7:0] - 19th parameter 1 1 - n_t9[7:0] - 20th parameter 1 1 - - - - - eot[3:0] - description this command is used to get setting of display wavef orm cycles for rgb mode or video mode. nw[2:0] : inversion type setting. nw_pe[2:0] : inversion type setting on partial idle mode. nw2 nw1 nw0 inversion type 0 0 0 column inversion 0 0 1 1-dot inversion 0 1 0 2-dot inversion 0 1 1 4-dot inversion 1 0 0 inhibit 1 0 1 inhibit 1 1 0 inhibit 1 1 1 inhibit shr[11:0]: gsp hsync rise. shr_0[7:0] start pulse output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xffeh 1022 x hsync 0xfffh 1023 x hsync spon[7:0]: gsp pulse delay. spon[7:0] start pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.243- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0xfeh 1016 x osc clk 0xffh 1020 x osc clk note: 1. spon[7:0] < spoff[7:0] rtn[7:0] spoff[7:0]: gsp pulse width. spon[7:0] start pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 x osc clk 0xffh 1020 x osc clk note: 1. spon[7:0] < spoff[7:0] rtn[7:0] shp[3:0]: width of gsp high pulse. shp3 shp2 shp1 shp0 start pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync chr[7:0]: ck hsync rise. chr[7:0] ck pulse start output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xffeh 510 x hsync 0xfffh 511 x hsync con[7:0]: ck pulse delay. con[7:0] ck pulse output delay 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 x osc clk 0xffh 1020 x osc clk note: 1. con[7:0] < coff[7:0] rtn[7:0] coff[7:0]: ck pulse width. coff[7:0] ck pulse output 0x00h 0 x osc clk 0x01h 4 x osc clk 0x02h 8 x osc clk 0x03h 12 x osc clk 0x04h 16 x osc clk 0x05h 20 x osc clk ????? 0xfeh 1016 x osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.244- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 0xffh 1020 x osc clk note: 1. con[7:0] < coff[7:0] rtn[7:0] chp[3:0]: width of ck high pulse. chp3 chp2 chp1 chp0 ck pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync ccp[3:0]: a cycle of ck pulse. ccp3 ccp2 ccp1 ccp0 ck pulse cycle 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync n_t1[7:0]: the timing definition of t1. n_t1[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t2[7:0]: the timing definition of t2. n_t2[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t3[7:0]: the timing definition of t3. n_t3[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.245- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t4[7:0]: the timing definition of t4. n_t4[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t5[7:0]: the timing definition of t5. n_t5[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t6[7:0]: the timing definition of t6. n_t6[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t7[7:0] : the timing definition of t7. n_t1[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.246- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 n_t8[7:0]: the timing definition of t8. n_t8[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk n_t9[7:0]: the timing definition of t9. n_t9[7:0] clock cycles 0 0 0 0 0 0 0 0 0 x osc clk 0 0 0 0 0 0 0 1 4 x osc clk 0 0 0 0 0 0 1 0 8 x osc clk 0 0 0 0 0 0 1 1 12 x osc clk 0 0 0 0 0 1 0 0 16 x osc clk . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 0 0 1008 x osc clk 1 1 1 1 1 1 0 1 1012 x osc clk 1 1 1 1 1 1 1 0 1016 x osc clk 1 1 1 1 1 1 1 1 1020 x osc clk eqt[3:0]: equalizing period of tg output eqt3 eqt2 eqt1 eqt0 clock cycles 0 0 0 0 0 0 0 0 1 4 0 0 1 0 8 0 0 1 1 12 0 1 0 0 16 0 1 0 1 20 0 1 1 0 24 0 1 1 1 28 1 0 0 0 32 1 0 0 1 36 1 0 1 0 40 1 0 1 1 44 1 1 0 0 48 1 1 0 1 52 1 1 1 0 56 1 1 1 1 60 ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.247- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 restrictions - register availability default flow chart ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.248- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.74 setgamma: set gamma curve related setting (e 0h) setgammar ( set gamma curve related setting ) e0h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 0 0 0 0 e0 1 st parameter 1 1 - - - r_vrp0[5:0] xx 2 nd parameter 1 1 - - - r_vrp1[5:0] xx 3 rd parameter 1 1 - - - r_vrp2[5:0] xx 4 th parameter 1 1 - - - r_vrp3[5:0] xx 5 th parameter 1 1 - - - r_vrp4[5:0] xx 6 th parameter 1 1 - - - r_vrp5[5:0] xx 7 th parameter 1 1 - - r_prp0[6:0] xx 8 th parameter 1 1 - - r_prp1[6:0] xx 9 th parameter 1 1 - - - - r_ pkp0[4:0] xx 10 th parameter 1 1 - - - - r_pkp1[4:0] xx 11 th parameter 1 1 - - - - r_pkp2[4:0] xx 12 th parameter 1 1 - - - - r_pkp3[4:0] xx 13 th parameter 1 1 - - - - r_pkp4[4:0] xx 14 th parameter 1 1 - - - - r_pkp5[4:0] xx 15 th parameter 1 1 - - - - r_pkp6[4:0] xx 16 th parameter 1 1 - - - - r_pkp7[4:0] xx 17 th parameter 1 1 - - - - r_pkp8[4:0] xx 18 th parameter 1 1 - - - r_vrn0[5:0] xx 19 th parameter 1 1 - - - r_vrn1[5:0] xx 20 th parameter 1 1 - - - r_vrn2[5:0] xx 21 th parameter 1 1 - - - r_vrn3[5:0] xx 22 th parameter 1 1 - - - r_vrn4[5:0] xx 23 th parameter 1 1 - - - r_vrn5[5:0] xx 24 th parameter 1 1 - - r_prn0[6:0] xx 25 th parameter 1 1 - - r_prn1[6:0] xx 26 th parameter 1 1 - - - - r_pkn0[4:0] xx 27 th parameter 1 1 - - - - r_pkn1[4:0] xx 28 th parameter 1 1 - - - - r_pkn2[4:0] xx 29 th parameter 1 1 - - - - r_pkn3[4:0] xx 30 th parameter 1 1 - - - - r_pkn4[4:0] xx 31 th parameter 1 1 - - - - r_pkn5[4:0] xx 32 th parameter 1 1 - - - - r_pkn6[4:0] xx 33 th parameter 1 1 - - - - r_pkn7[4:0] xx 34 th parameter 1 1 - - - - r_pkn8[4:0] xx description register groups positive polarity negative polarity description r_prp0 6-0 r_prn0 6-0 variable resistor (prp/n0) for center ad justment center adjustment r_prp1 6-0 r_prn1 6-0 variable resistor (prp/n1)for center adj ustment r_pkp0 4-0 r_pkn0 4-0 32-to-1 selector (voltage level of grays cale 3) r_pkp1 4-0 r_pkn1 4-0 32-to-1 selector (voltage level of grays cale 7) r_pkp2 4-0 r_pkn2 4-0 32-to-1 selector (voltage level of grays cale 19) r_pkp3 4-0 r_pkn3 4-0 32-to-1 selector (voltage level of grays cale 25) r_pkp4 4-0 r_pkn4 4-0 32-to- 1 selector (voltage level of grayscale 32 for posit ive polarity and grayscale 31 for negative polarity) r_pkp5 4-0 r_pkn5 4-0 32-to-1 selector (voltage level of grays cale 38) r_pkp6 4-0 r_pkn6 4-0 32-to-1 selector (voltage level of grays cale 44) r_pkp7 4-0 r_pkn7 4-0 32-to-1 selector (voltage level of grays cale 56) macro adjustment r_pkp8 4-0 r_pkn8 4-0 32-to-1 selector (voltage level of grays cale 60) r_vrp0 5-0 r_vrn0 5-0 variable resistor (vrp/n0)for offset adj ustment r_vrp1 5-0 r_vrn1 5-0 variable resistor (vrp/n1)for offset adj ustment r_vrp2 5-0 r_vrn2 5-0 variable resistor (vrp/n2)for offset adj ustment r_ vrp3 5-0 r_vrn3 5-0 variable resistor (vrp/n3)for offset adj ustment r_vrp4 5-0 r_vrn4 5-0 variable resistor (vrp/n4)for offset adj ustment offset adjustment r_vrp5 5-0 r_vrn5 5-0 variable resistor (vrp/n5)for offset adj ustment restriction setextc turn on to enable this command. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.249- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset r_vrp0[5:0]=0x04h, r_vrp1[5:0]=0x0ch, r_vrp2[5:0]=0x0dh, r_vrp3[5:0]=0x0ah, r_vrp4[5:0]=0x15h, r_vrp5[5:0]=0x21h, r_prp0[6:0]=0x0dh, r_prp1[6:0]=0x19h, r_ pkp0[4:0]=0x06h, r_ pkp1[4:0]=0x0ch, r_ pkp2[4:0]=0x0fh, r_ pkp3[4:0]=0x13h, r_ pkp4[4:0]=0x16h, r_ pkp5[4:0]=0x14h, r_ pkp6[4:0]=0x15h, r_ pkp7[4:0]=0x0dh, r_ pkp8[4:0]=0x13h, r_vrn0[5:0]=0x04h, r_vrn1[5:0]=0x0ch, r_vrn2[5:0]=0x0dh, r_vrn3[5:0]=0x0ah, r_vrn4[5:0]=0x15h, r_vrn5[5:0]=0x21h, r_prn0[6:0]=0x0dh, r_prn1[6:0]=0x19h, r_ pkn0[4:0]=0x06h, r_ pkn1[4:0]=0x0ch, r_ pkn2[4:0]=0x0fh, r_ pkn3[4:0]=0x13h, r_ pkn4[4:0]=0x16h, r_ pkn5[4:0]=0x14h, r_ pkn6[4:0]=0x15h, r_ pkn7[4:0]=0x0dh, r_ pkn8[4:0]=0x13h r_vrp0[5:0], r_vrp1[5:0], r_vrp2[5:0], r_vrp3[5:0], r_vrp4[5:0], r_vrp5[5:0], r_prp0[6:0], r_prp1[6:0], r_ pkp0[4:0], r_ pkp1[4:0], r_ pkp2[4:0], r_ pkp3[4:0], r_ pkp4[4:0], r_ pkp5[4:0], r_ pkp6[4:0], r_ pkp7[4:0], r_ pkp8[4:0], r_vrn0[5:0], r_vrn1[5:0], r_vrn2[5:0], r_vrn3[5:0], r_vrn4[5:0], r_vrn5[5:0], r_prp0[6:0], r_prp1[6:0], r_ pkn0[4:0], r_ pkn1[4:0], r_ pkn2[4:0], r_ pkn3[4:0], r_ pkn4[4:0], r_ pkn5[4:0], r_ pkn6[4:0], r_ pkn7[4:0], r_ pkn8[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.250- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.75 setggamma: set green gamma curve related set ting (e1h) setgammar ( set gamma curve related setting ) e1h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 0 0 0 1 e1 1 st parameter 1 1 - - - g_vrp0[5:0] xx 2 nd parameter 1 1 - - - g_vrp1[5:0] xx 3 rd parameter 1 1 - - - g_vrp2[5:0] xx 4 th parameter 1 1 - - - g_vrp3[5:0] xx 5 th parameter 1 1 - - - g_vrp4[5:0] xx 6 th parameter 1 1 - - - g_vrp5[5:0] xx 7 th parameter 1 1 - - g_prp0[6:0] xx 8 th parameter 1 1 - - g_prp1[6:0] xx 9 th parameter 1 1 - - - - g_ pkp0[4:0] xx 10 th parameter 1 1 - - - - g_pkp1[4:0] xx 11 th parameter 1 1 - - - - g_pkp2[4:0] xx 12 th parameter 1 1 - - - - g_pkp3[4:0] xx 13 th parameter 1 1 - - - - g_pkp4[4:0] xx 14 th parameter 1 1 - - - - g_pkp5[4:0] xx 15 th parameter 1 1 - - - - g_pkp6[4:0] xx 16 th parameter 1 1 - - - - g_pkp7[4:0] xx 17 th parameter 1 1 - - - - g_pkp8[4:0] xx 18 th parameter 1 1 - - - g_vrn0[5:0] xx 19 th parameter 1 1 - - - g_vrn1[5:0] xx 20 th parameter 1 1 - - - g_vrn2[5:0] xx 21 th parameter 1 1 - - - g_vrn3[5:0] xx 22 th parameter 1 1 - - - g_vrn4[5:0] xx 23 th parameter 1 1 - - - g_vrn5[5:0] xx 24 th parameter 1 1 - - g_prn0[6:0] xx 25 th parameter 1 1 - - g_prn1[6:0] xx 26 th parameter 1 1 - - - - g_pkn0[4:0] xx 27 th parameter 1 1 - - - - g_pkn1[4:0] xx 28 th parameter 1 1 - - - - g_pkn2[4:0] xx 29 th parameter 1 1 - - - - g_pkn3[4:0] xx 30 th parameter 1 1 - - - - g_pkn4[4:0] xx 31 th parameter 1 1 - - - - g_pkn5[4:0] xx 32 th parameter 1 1 - - - - g_pkn6[4:0] xx 33 th parameter 1 1 - - - - g_pkn7[4:0] xx 34 th parameter 1 1 - - - - g_pkn8[4:0] xx description register groups positive polarity negative polarity description g_prp0 6-0 g_prn0 6-0 variable resistor (prp/n0) for center ad justment center adjustment g_prp1 6-0 g_prn1 6-0 variable resistor (prp/n1)for center adj ustment g_pkp0 4-0 g_pkn0 4-0 32-to-1 selector (voltage level of grays cale 3) g_pkp1 4-0 g_pkn1 4-0 32-to-1 selector (voltage level of grays cale 7) g_pkp2 4-0 g_pkn2 4-0 32-to-1 selector (voltage level of grays cale 19) g_pkp3 4-0 g_pkn3 4-0 32-to-1 selector (voltage level of grays cale 25) g_pkp4 4-0 g_pkn4 4-0 32-to- 1 selector (voltage level of grayscale 32 for posit ive polarity and grayscale 31 for negative polarity) g_pkp5 4-0 g_pkn5 4-0 32-to-1 selector (voltage level of grays cale 38) g_pkp6 4-0 g_pkn6 4-0 32-to-1 selector (voltage level of grays cale 44) g_pkp7 4-0 g_pkn7 4-0 32-to-1 selector (voltage level of grays cale 56) macro adjustment g_pkp8 4-0 g_pkn8 4-0 32-to-1 selector (voltage level of grays cale 60) g_vrp0 5-0 g_vrn0 5-0 variable resistor (vrp/n0)for offset adj ustment g_vrp1 5-0 g_vrn1 5-0 variable resistor (vrp/n1)for offset adj ustment g_vrp2 5-0 g_vrn2 5-0 variable resistor (vrp/n2)for offset adj ustment g_ vrp3 5-0 g_vrn3 5-0 variable resistor (vrp/n3)for offset adj ustment g_vrp4 5-0 g_vrn4 5-0 variable resistor (vrp/n4)for offset adj ustment offset adjustment g_vrp5 5-0 g_vrn5 5-0 variable resistor (vrp/n5)for offset adj ustment restriction setextc turn on to enable this command. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.251- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset g_vrp0[5:0]=0x04h, g_vrp1[5:0]=0x0ch, g_vrp2[5:0]=0x0dh, g_vrp3[5:0]=0x0ah, g_vrp4[5:0]=0x15h, g_vrp5[5:0]=0x21h, g_prp0[6:0]=0x0dh, g_prp1[6:0]=0x19h, g_ pkp0[4:0]=0x06h, g_ pkp1[4:0]=0x0ch, g_ pkp2[4:0]=0x0fh, g_ pkp3[4:0]=0x13h, g_ pkp4[4:0]=0x16h, g_ pkp5[4:0]=0x14h, g_ pkp6[4:0]=0x15h, g_ pkp7[4:0]=0x0dh, g_ pkp8[4:0]=0x13h, g_vrn0[5:0]=0x04h, g_vrn1[5:0]=0x0ch, g_vrn2[5:0]=0x0dh, g_vrn3[5:0]=0x0ah, g_vrn4[5:0]=0x15h, g_vrn5[5:0]=0x21h, g_prn0[6:0]=0x0dh, g_prn1[6:0]=0x19h, g_ pkn0[4:0]=0x06h, g_ pkn1[4:0]=0x0ch, g_ pkn2[4:0]=0x0fh, g_ pkn3[4:0]=0x13h, g_ pkn4[4:0]=0x16h, g_ pkn5[4:0]=0x14h, g_ pkn6[4:0]=0x15h, g_ pkn7[4:0]=0x0dh, g_ pkn8[4:0]=0x13h g_vrp0[5:0], g_vrp1[5:0], g_vrp2[5:0], g_vrp3[5:0], g_vrp4[5:0], g_vrp5[5:0], g_prp0[6:0], g_prp1[6:0], g_ pkp0[4:0], g_ pkp1[4:0], g_ pkp2[4:0], g_ pkp3[4:0], g_ pkp4[4:0], g_ pkp5[4:0], g_ pkp6[4:0], g_ pkp7[4:0], g_ pkp8[4:0], g_vrn0[5:0], g_vrn1[5:0], g_vrn2[5:0], g_vrn3[5:0], g_vrn4[5:0], g_vrn5[5:0], g_prp0[6:0], g_prp1[6:0], g_ pkn0[4:0], g_ pkn1[4:0], g_ pkn2[4:0], g_ pkn3[4:0], g_ pkn4[4:0], g_ pkn5[4:0], g_ pkn6[4:0], g_ pkn7[4:0], g_ pkn8[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.252- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.76 setbgamma: set green blue curve related sett ing (e2h) setgammar ( set gamma curve related setting ) e2h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 0 0 1 0 e2 1 st parameter 1 1 - - - b_vrp0[5:0] xx 2 nd parameter 1 1 - - - b_vrp1[5:0] xx 3 rd parameter 1 1 - - - b_vrp2[5:0] xx 4 th parameter 1 1 - - - b_vrp3[5:0] xx 5 th parameter 1 1 - - - b_vrp4[5:0] xx 6 th parameter 1 1 - - - b_vrp5[5:0] xx 7 th parameter 1 1 - - b_prp0[6:0] xx 8 th parameter 1 1 - - b_prp1[6:0] xx 9 th parameter 1 1 - - - - b_ pkp0[4:0] xx 10 th parameter 1 1 - - - - b_pkp1[4:0] xx 11 th parameter 1 1 - - - - b_pkp2[4:0] xx 12 th parameter 1 1 - - - - b_pkp3[4:0] xx 13 th parameter 1 1 - - - - b_pkp4[4:0] xx 14 th parameter 1 1 - - - - b_pkp5[4:0] xx 15 th parameter 1 1 - - - - b_pkp6[4:0] xx 16 th parameter 1 1 - - - - b_pkp7[4:0] xx 17 th parameter 1 1 - - - - b_pkp8[4:0] xx 18 th parameter 1 1 - - - b_vrn0[5:0] xx 19 th parameter 1 1 - - - b_vrn1[5:0] xx 20 th parameter 1 1 - - - b_vrn2[5:0] xx 21 th parameter 1 1 - - - b_vrn3[5:0] xx 22 th parameter 1 1 - - - b_vrn4[5:0] xx 23 th parameter 1 1 - - - b_vrn5[5:0] xx 24 th parameter 1 1 - - b_prn0[6:0] xx 25 th parameter 1 1 - - b_prn1[6:0] xx 26 th parameter 1 1 - - - - b_pkn0[4:0] xx 27 th parameter 1 1 - - - - b_pkn1[4:0] xx 28 th parameter 1 1 - - - - b_pkn2[4:0] xx 29 th parameter 1 1 - - - - b_pkn3[4:0] xx 30 th parameter 1 1 - - - - b_pkn4[4:0] xx 31 th parameter 1 1 - - - - b_pkn5[4:0] xx 32 th parameter 1 1 - - - - b_pkn6[4:0] xx 33 th parameter 1 1 - - - - b_pkn7[4:0] xx 34 th parameter 1 1 - - - - b_pkn8[4:0] xx description register groups positive polarity negative polarity description b_prp0 6-0 b_prn0 6-0 variable resistor (prp/n0) for center ad justment center adjustment b_prp1 6-0 b_prn1 6-0 variable resistor (prp/n1)for center adj ustment b_pkp0 4-0 b_pkn0 4-0 32-to-1 selector (voltage level of grays cale 3) b_pkp1 4-0 b_pkn1 4-0 32-to-1 selector (voltage level of grays cale 7) b_pkp2 4-0 b_pkn2 4-0 32-to-1 selector (voltage level of grays cale 19) b_pkp3 4-0 b_pkn3 4-0 32-to-1 selector (voltage level of grays cale 25) b_pkp4 4-0 b_pkn4 4-0 32-to- 1 selector (voltage level of grayscale 32 for posit ive polarity and grayscale 31 for negative polarity) b_pkp5 4-0 b_pkn5 4-0 32-to-1 selector (voltage level of grays cale 38) b_pkp6 4-0 b_pkn6 4-0 32-to-1 selector (voltage level of grays cale 44) b_pkp7 4-0 b_pkn7 4-0 32-to-1 selector (voltage level of grays cale 56) macro adjustment b_pkp8 4-0 b_pkn8 4-0 32-to-1 selector (voltage level of grays cale 60) b_vrp0 5-0 b_vrn0 5-0 variable resistor (vrp/n0)for offset adj ustment b_vrp1 5-0 b_vrn1 5-0 variable resistor (vrp/n1)for offset adj ustment b_vrp2 5-0 b_vrn2 5-0 variable resistor (vrp/n2)for offset adj ustment b_ vrp3 5-0 b_vrn3 5-0 variable resistor (vrp/n3)for offset adj ustment b_vrp4 5-0 b_vrn4 5-0 variable resistor (vrp/n4)for offset adj ustment offset adjustment b_vrp5 5-0 b_vrn5 5-0 variable resistor (vrp/n5)for offset adj ustment restriction setextc turn on to enable this command. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.253- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset b_vrp0[5:0]=0x04h, b_vrp1[5:0]=0x0ch, b_vrp2[5:0]=0x0dh, b_vrp3[5:0]=0x0ah, b_vrp4[5:0]=0x15h, b_vrp5[5:0]=0x21h, b_prp0[6:0]=0x0dh, b_prp1[6:0]=0x19h, b_ pkp0[4:0]=0x06h, b_ pkp1[4:0]=0x0ch, b_ pkp2[4:0]=0x0fh, b_ pkp3[4:0]=0x13h, b_ pkp4[4:0]=0x16h, b_ pkp5[4:0]=0x14h, b_ pkp6[4:0]=0x15h, b_ pkp7[4:0]=0x0dh, b_ pkp8[4:0]=0x13h, b_vrn0[5:0]=0x04h, b_vrn1[5:0]=0x0ch, b_vrn2[5:0]=0x0dh, b_vrn3[5:0]=0x0ah, b_vrn4[5:0]=0x15h, b_vrn5[5:0]=0x21h, b_prn0[6:0]=0x0dh, b_prn1[6:0]=0x19h, b_ pkn0[4:0]=0x06h, b_ pkn1[4:0]=0x0ch, b_ pkn2[4:0]=0x0fh, b_ pkn3[4:0]=0x13h, b_ pkn4[4:0]=0x16h, b_ pkn5[4:0]=0x14h, b_ pkn6[4:0]=0x15h, b_ pkn7[4:0]=0x0dh, b_ pkn8[4:0]=0x13h b_vrp0[5:0], b_vrp1[5:0], b_vrp2[5:0], b_vrp3[5:0], b_vrp4[5:0], b_vrp5[5:0], b_prp0[6:0], b_prp1[6:0], b_ pkp0[4:0], b_ pkp1[4:0], b_ pkp2[4:0], b_ pkp3[4:0], b_ pkp4[4:0], b_ pkp5[4:0], b_ pkp6[4:0], b_ pkp7[4:0], b_ pkp8[4:0], b_vrn0[5:0], b_vrn1[5:0], b_vrn2[5:0], b_vrn3[5:0], b_vrn4[5:0], b_vrn5[5:0], b_prp0[6:0], b_prp1[6:0], b_ pkn0[4:0], b_ pkn1[4:0], b_ pkn2[4:0], b_ pkn3[4:0], b_ pkn4[4:0], b_ pkn5[4:0], b_ pkn6[4:0], b_ pkn7[4:0], b_ pkn8[4:0] ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.254- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.77 setchemode (e3h) setchemode (set color enhancement mode) e3h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 0 0 1 1 e3 1 st parameter 1 1 - - - se_mode[1:0] be_mode[1:0] ce_mode[1:0] - description this command is used to set setting of color enhancement function. se_mode[1:0]: the bit is set sharpness enhancement function. se_mode[1:0] sharpness enhancement 00 disable 01 lower 10 middle 11 high be_mode[1:0]: the bit is set brightness enhancement function. be_mode[1:0] brightness enhancement 00 disable 01 lower 10 middle 11 high ce_mode[1:0]: the bit is set color enhancement function. ce_mode[1:0] color enhancement 00 disable 01 lower 10 middle 11 high restrictions setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset se_mode[1:0]=00, be_mode[1:0]=00, ce_mode[1:0]=00 - ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.255- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.78 setotpkey (e9h) setotpkey e9h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 1 0 0 1 e9 1 st parameter 1 1 - otp_key0[7:0] 00h 2 nd parameter 1 1 - otp_key1[7:0] 00h description this command is used to set otp key to enter or lea ve otp program mode. otp_key0[7:0] otp_key1[7:0] description note otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h enter otp program mode otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h leave otp program mode other value invalid 1. if HX8392-A operate on otp program mode, then keep on otp program mode. 2. if HX8392-A operate on non-otp program mode, then keep on non-otp program mode. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset otp_key0[7:0]=0x00h, otp_key1[7:0]=0x00h n/a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.256- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.79 gethxid (f4h) gethxic f4h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 0 1 0 0 f4 1 st parameter 1 1 - himax id[7:0] 92 description this command is used to get driver ic i d code. restrictions setextc turn on to enable this command . register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset himax id[7:0] = 0x92h n/a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.257- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 6.2.80 getdb (f7h) getdb f7h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 0 1 1 1 f7 1 st parameter 1 1 - db[7:0] xx description this command is used to get db[7:0] sta tus. restrictions setextc turn on to enable this command . register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset n/a n/a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.258- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 7. layout recommendation 7.1 layout recommendation 7.1.1 architecture 1 C internal charge pumping circ uit figure 7.1: layout recommendation of internal charg e pumping circuit ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.259- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 7.1.2 architecture 2 - hx5186-a 10 ohm 100 ohm 100 ohm 10 ohm 100 ohm 10 ohm 10 ohm 5 ohm 20 ohm 20 ohm 20 ohm 100 ohm 20 ohm 100 ohm 5 ohm 10 ohm 5 ohm 100 ohm 100 ohm 10 ohm 5 ohm 5 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 100 ohm 5 ohm 6 ohm 6 ohm 5 ohm 6 ohm 5 ohm 6 ohm 6 ohm 5 ohm 6 ohm 6 ohm 5 ohm 6 ohm 6 ohm 6 ohm 5 ohm 5 ohm 5 ohm 10 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 10 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 20 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 5 ohm 10 ohm 20 ohm 20 ohm 20 ohm 20 ohm 20 ohm 20 ohm 20 ohm 20 ohm 10 ohm 10 ohm 5 ohm 100 ohm 100 ohm 10 ohm te cabc_pwm_out bs2 bs3 bs0 bs1 resx db1 db0 db3 db2 db5 db4 db7 db6 db9 db8 db11 db10 db13 db12 db15 db14 db17 db16 db19 db18 db21 db20 db23 db22 wrx_scl rdx csx dcx sdo sdi hsync vsync pclk de pbctl_b1 pbctl_b2 pbctl_a1 pbctl_a2 hs_d3n hs_d3p hs_d0n hs_d0p hs_ckn hs_ckp hs_d1n hs_d1p hs_d2n hs_d2p c2 c3 c17 c16 c4 c19 c13 c14 c11 c12 c1 d1 vgl vgh vcom vsn vsp vsp vcom vgh vgl c18 vcsw2 vcsw1 d2 vgl x face down (top view) HX8392-A pin assignment dummy vcom vcom vcom dummy vcomr vgl vgl vgh_r vgh_r vgh_r vssa vssa vssa vssa vssa vssa vssa vssa vspr vtes toutp vspc vssac vssd vdddn vdd3 vddd vddd vddd vgh vgh vgh_r vspc vsnr vtestoutn vdd2 vssac vssac vssac vssac vref vssd vssd vssd vssd vssd vdddn vdddn vdd3 vdd3 vdd3 vdddn vdddn vcsw1 vdd3 vdd3 vcsw2 vddd vddd vddd vddd vddd vddd vddd vddd vdddn vcom vssd vssd vdd1 vdd1 vdd1 vdd1 vdd1 te1 wrx_scl rdx iognddum db23 db22 db1 6 db 12 db 11 db 10 db9 db7 res x test0 cabc_pwm_out dummy hs_d2 p hs_d2p hs_d2n hs_d2n hs_d1 p hs_d1n hs_d1n hs_v ss hs_vss hs_d0 p hs_d0 p hs_d0 p hs_d0 p hs_d0n hs_d0n hs_d3n hs_d3n hs_vs s dummy vcl vcl vcl c41n c41n c41n c42n c42 p c14p c14n c13n c13n c13n c12n c12n c12n c11n c11n c11n vssd dcx vss d vssd vssd vssd vssd vssd vssd vdd1 vssd vssd db2 1 db2 0 db1 9 db1 8 db1 4 db13 db1 5 iognddum db8 iognddum iognddum db6 bs 3 bs 2 bs 1 bs 0 test1 test2 hs_d1 p hs_d2n hs_d1 p hs_d1 p hs_d2n hs_d1n hs_d1n hs_ckn hs_ckn hs_ckn hs_ck p hs_ck p hs_ck p hs_ck p hs_ckn hs_d3 p hs_d3p hs_d3p hs_v ss hs_d3p hs_d0n hs_d0n hs_vs s hs_d3n hs_vs s hs_d3n hs_vs s hs_ldo hs_ldo hs_ldo hs_ldo c14n c14n c14p c14p vsp v sp vsp vsp db1 7 osc pclk de hsync vsync sdo sdi iognddum csx hs_v ss hs_vs s hs_d2 p hs_vs s hs_d2p c41p vdd3 vdd3 c11p c11p c11p c12p c31p c31p c31p c31n c31n vsn vpp c24n c24n c24n c24p c24p c24p c23n c22n c22n vsn vsn c32p c32p c32n c32n c32n c32n vssd c31n c32p vsn c22p c21n c21n vcom vssa vgh c21p dummy vcom vcom dummyr2 vssa dummyr1 vssa vssa vssa vgl vgl vgl c21p vgh c21p vgh c21n gck1_l vcom_l vcom_l dummy gck4_l gck2_l gck3_l gck5_l gck6_l vgh_l vgh_l vgh_l vgl vcom_l vgl vgl vcom_l vcom_l vcom_l dummy y (0,0) (a+) hs_vss db5 db4 db 3 db2 db 1 db 0 c42n c42n c42 p c42 p c41p c41p vdd3 vdd3 vdd3 vdd3 vdd3 vdd3 c12p c12p c13p c13p c13p vsp vsp vsp vsp vssd vssd vssd vssd c23n c23n c23p c23p c23p c22n c22p c22p (a-) dummy dummy dummy dummy dummy s199 dummy dummy dummy s201 s197 dummy dummy dummy dummy dummy s200 dummy dummy dummy s202 s198 no.1 no.419 no.677 no.1438 no.420 gsp_l gck8 _l sw2_l init_l sw3_l sw1_l dummy dummy dummy ud_l dummy dummy dummy dummy dummy dummy dummy dummy gck7 _l dummy s800 dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy s795 s791 s793 s797 s796 s792 s790 s794 s798 dummy dummy dummy dummy dummy s605 s603 s601 s607 s609 dummy dummy dummy dummy dummy dummy s 606 s 604 s 602 s 608 s 610 s799 s595 s593 s591 dummy s599 s597 dummy dummy s596 s590 s594 s592 dummy s600 s598 dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy s405 s409 s407 s403 s404 s408 s410 s406 s402 s401 s400 s398 s396 dummy s399 s397 s391 s389 s393 s39 2 s39 0 s39 4 s395 vgh_r vcom_r vcom_r gck1_r vgh_r vgh_r gck2_r gck3_r vgl vgl vgl vcom_r vcom_r vcom_r vcom_r dummy dummy dummy dummy dummy g ck5_r g sp_r dummy ud_r init_r s w3_r dummy dummy dummy dummy dummy g ck7_r g ck8_r g ck6_r dummy g ck4_r dummy dummy dummy dummy dummy dummy dummy sw1_r dummy dummy dummy s w2_r dummy s3 s1 dummy dummy s 2 s 4 dummy dummy dummy vcom vcomr vgl vgh vssa vssa vspr vsnr vdd2 vssac vref vssd vssd vdddn vdd3 vdd3 vddd vss d vdd1 hs_v ss hs_v cc hs_v cc hs_v cc vcl c41n c42n c42p c41p vdd3 c11p c12p c13 p c1 4p c14n c13n c12n c11n v sp c31p c31n c32p vsn vsn vpp c24n c24p c23n c23p c22n c22p c21n c21p vgh vgl vssa vcom sw2b_l sw1b_l sw3b_l dummy dummy dummy dummy dummy dummy dummy dummy sw3b_r sw2b_r sw1b_r v com v dddn te pbctl_a1 pbctl_a2 pbctl_b1 pbctl_b2 hs_ vss hs_v ss hs_vcc vdd3 vdd3 vdd3 vsp c1 8n c18p c17p c17p c17p c16p c16p c16p c15p c15p c15p c18p c18p c1 8n c1 8n c15n c15n c15n c16n c16n c16n c17n c17n c17n c15n c16n c17n c18n c18p c17 p c16p c15p vssd vssd vssd vssd vssd vssd te1 vsp vsn gnd ctrl_a ctrl_b vin c2p c2n c3n c3p c1p c1n c22 c20 c21 vsp vsn vcsw1 vcsw2 u1 c11 vgh_r figure 7.2: layout recommendation of hx5186-a ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.260- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 7.2 maximum layout resistance name type maximum series resistance unit vdd1 power supply 5 ? vdd2 power supply 5 ? vdd3 power supply 5 ? vssd power supply 5 ? vssa power supply 5 ? hs_vcc power supply 5 ? hs_vss power supply 5 ? vssac power supply 20 ? bs[3:0] input 100 ? rdx, wrx_scl, dcx, csx, resx input 100 ? hsync, vsync, de, pclk input 100 ? sdi input 100 ? sdo output 100 ? db[23:0] input + output 100 ? cabc_pwm_out, te, te1, pbctl_a1, pbctl_a2 pbctl_b1, pbctl_b2 vcsw1, vcsw2 output 100 ? vcom output 10 ? hs_cp, hs_cn input 6 ? hs_d0p, hs_d0n input + output 6 ? hs_d1p, hs_d1n input 6 ? hs_d2p, hs_d2n input 6 ? hs_d3p, hs_d3n input 6 ? vddd capacitor connection 5 ? vdddn capacitor connection 10 ? vsp capacitor connection 10 ? vsn capacitor connection 10 ? vspr, vsnr capacitor connection 20 ? vref, vpp capacitor connection 20 ? vgh, vgl, vcl, vgh_r capacitor connection 10 ? hs_ldo capacitor connection 10 ? osc input 100 ? c11p, c11n, c12p, c12n, c13p, c13n, c14p, c14n, c15p, c15n, c16p, c16n, c17p, c17n, c18p, c18n, c31p, c31n, c32p, c32n, c41p, c41n, c42p, c42n capacitor connection 5 ? c21p, c21n, c22p, c22n c23p, c23n, c24p, c24n capacitor connection 20 ? test[2:0] input 100 ? vtestoutp, vtestoutn output 100 ? table 7.1: maximum layout resistance ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.261- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 7.3 external components connection internal charge pumping mode: pad name symbol connection typical component value vcom c1 connect to capacitor (max 6v): vcom ---(-)--- -| |--- (+)----- vssa 2.2 f vgh c2 connect to capacitor (max 25v): vgh ---(+)----| |--- (-)----- vssa 1.0 f c3 connect to capacitor (max 16v): vgl ---(+)----| |- -- (-)----- vssa 1.0 f vgl d1 connect to schottky diode(vr 30v): vssa ---(-)---- ? --- (+)---- vgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) vcl c4 connect to capacitor (max 6v): vcl ---(-)----| |--- (+)----- vssa 1.0 f c21p C c21n c5 connect to capacitor (max 16v): c21p -- -(+)----| |--- (-)-----c21n 1.0 f c22p C c22n c6 connect to capacitor (max 16v): c22p -- -(+)----| |--- (-)-----c22n 1.0 f c23p C c23n c7 connect to capacitor (max 16v): c23p - --(+)----| |--- (-)-----c23n 1.0 f c24p C c24n c8 connect to capacitor (max 16v): c24p -- -(+)----| |--- (-)-----c24n 1.0 f c41p C c41n c9 connect to capacitor (max 6v): c41p -- -(+)----| |--- (-)-----c41n 1.0 f c42p C c42n c10 connect to capacitor (max 6v): c42p - --(+)----| |--- (-)-----c42n 1.0 f vspr c11 connect to capacitor (max 10v): vspr ---(+)----| |--- (-)-----vssa 1.0 f vsnr c12 connect to capacitor (max 10v): vsnr ---(+)---- | |--- (-)-----vssa 1.0 f vddd c13 connect to capacitor (max 6v): vddd ---(+)-- --| |--- (-)-----vssa 1.0 f vdddn c14 connect to capacitor (max 6v): vdddn ---(+) ----| |--- (-)-----vssa 1.0 f vref c15 connect to capacitor (max 6v): vref ---(-)---- | |--- (+)----- vssa 1.0 f vsp c16 connect to capacitor (max 10v):vsp ---(+)----| | --- (-)-----vssa 2.2 f c17 connect to capacitor (max 10v):vsn ---(+)----| |-- - (-)-----vssa 2.2 f vsn d2 connect to schottky diode(vr 30v): vsn ---(-)---- ? --- (+)---- vgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) vdd3 c18 connect to capacitor (max 10v): vdd3 ---(+)-- --| |--- (-)-----vssa 1.0 f hs_ldo c19 connect to capacitor (max 6v): hs_ldo ---( +)----| |--- (-)----hd_vss 1.0 f c11p C c11n c20 connect to capacitor (max 6v): c11p - --(+)----| |--- (-)-----c11n 1.0 f c12p C c12n c21 connect to capacitor (max 6v): c12p - --(+)----| |--- (-)-----c12n 1.0 f c13p C c13n c22 connect to capacitor (max 6v): c13p - --(+)----| |--- (-)-----c13n 1.0 f c14p C c14n c23 connect to capacitor (max 6v): c14p - --(+)----| |--- (-)-----c14n 1.0 f c15p C c15n c24 connect to capacitor (max 6v): c15p - --(+)----| |--- (-)-----c15n 1.0 f c16p C c16n c25 connect to capacitor (max 6v): c16p - --(+)----| |--- (-)-----c16n 1.0 f c17p C c17n c26 connect to capacitor (max 6v): c17p - --(+)----| |--- (-)-----c17n 1.0 f c18p C c18n c27 connect to capacitor (max 6v): c18p - --(+)----| |--- (-)-----c18n 1.0 f c31p C c31n c28 connect to capacitor (max 10v): c23p - --(+)----| |--- (-)-----c23n 1.0 f c32p C c32n c29 connect to capacitor (max 10v): c24p - --(+)----| |--- (-)-----c24n 1.0 f vgh_r c30 connect to capacitor (max 25v): vgh_r ---(+) ----| |--- (-)----- vssa 1.0 f hx5186-a mode: pad name symbol connection typical component value vcom c1 connect to capacitor (max 6v): vcom ---(-)--- -| |--- (+)----- vssa 2.2 m f vgh c2 connect to capacitor (max 25v): vgh ---(+)----| |--- (-)----- vssa 1.0 m f c3 connect to capacitor (max 16v): vgl ---(+)----| |- -- (-)----- vssa 1.0 m f vgl d1 connect to schottky diode(vr 30v): vssa ---(-)---- ? --- (+)---- vgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) vcl c4 connect to capacitor (max 6v): vcl ---(-)----| |--- (+)----- vssa 1.0 f c21p C c21n c5 connect to capacitor (max 16v): c21p -- -(+)----| |--- (-)-----c21n 1.0 f c22p C c22n c6 connect to capacitor (max 16v): c22p -- -(+)----| |--- (-)-----c22n 1.0 f c41p C c41n c9 connect to capacitor (max 6v): c41p -- -(+)----| |--- (-)-----c41n 1.0 f c42p C c42n c10 connect to capacitor (max 6v): c42p - --(+)----| |--- (-)-----c42n 1.0 f vspr c11 connect to capacitor (max 10v): vspr ---(+)----| |--- (-)-----vssa 1.0 f vsnr c12 connect to capacitor (max 10v): vsnr ---(+)---- | |--- (-)-----vssa 1.0 f vddd c13 connect to capacitor (max 6v): vddd ---(+)-- --| |--- (-)-----vssa 1.0 f vdddn c14 connect to capacitor (max 6v): vdddn ---(+) ----| |--- (-)-----vssa 1.0 f vref c15 connect to capacitor (max 6v): vref ---(-)---- | |--- (+)----- vssa 1.0 f vsp c16 connect to capacitor (max 10v):vsp ---(+)----| |- -- (-)-----vssa 2.2 f c17 connect to capacitor (max 10v):vsn ---(+)----| |-- - (-)-----vssa 2.2 f vsn d2 connect to schottky diode(vr 30v): vsn ---(-)---- ? --- (+)---- vgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) vdd3 c18 connect to capacitor (max 10v): vdd3 ---(+)-- --| |--- (-)-----vssa 1.0 f ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.262- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 hs_ldo c19 connect to capacitor (max 6v): hs_ldo ---( +)----| |--- (-)----hs_vss 1.0 f hx5186-a u1 please refer hx5186-a datasheet - hx5186-a c20 please refer hx5186-a datasheet 1.0uf hx5186-a c21 please refer hx5186-a datasheet 1.0uf hx5186-a c22 please refer hx5186-a datasheet 1.0uf vgh_r c30 connect to capacitor (max 25v): vgh_r ---(+) ----| |--- (-)----- vssa 1.0 f table 7.2: adoptability of component ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.263- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8. electrical characteristics 8.1 absolute maximum ratings the absolute maximum ratings are list on table 8.1. when used out of the absolute maximum ratings, the lsi may be permanently damaged. using the lsi within the following electrical characteristics limit is strongly recommended for n ormal operation. if these electrical characteristic conditions are exceeded during norma l operation, the lsi will malfunction and cause poor reliability. item symbol unit value note power supply voltage 1 vdd1~ vssd v -0.3 to +3.6 note (1),(2) power supply voltage 2 vdd2 ~ vssa v -0.3 to +5.5 note (1),(3) power supply voltage 3 vdd3 ~ vssa v -0.3 to +5.5 note (1) (4) power supply voltage 4 hs_vcc ~ hs_vss v -0.3 to +3.6 note (1) (5) power supply voltage 5 vsp ~ vssa v -0.3 to +6.6 note (6) power supply voltage 6 vssa ~ vsn v 0 to -6.6 note (7) power supply voltage 7 vgh ~ vssa v -0.3 to +25 note (8) power supply voltage 8 vssa ~ vgl v 0 to -16 note (9) operating temperature topr c -40 to +85 note (10) storage temperature tstg c -55 to +110 note (11) note: (1) vdd1, vssd must be maintained. (2) to make sure vdd1 vssd. (3) to make sure vdd2 vssa. (4) to make sure vdd3 vssa. (5) to make sure hs_vcc hs_vss. (6) to make sure vsp vssa. (7) to make sure vssa vsn (8) to make sure vgh vssa. (9) to make sure vssa vgl vgh +|vgl| < 30v (10) for die and wafer products, specified up to +8 5 . (11) this temperature specifications apply to the t cp package. table 8.1: absolute maximum rating ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.264- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.2 dc characteristics (vdd2=2.5 ~ 4.8v, vdd3=2.5 ~ 4.8v, vdd1=1.65~3.3v, t a =-40 ~ 85 c) item symbol unit test condition min. typ. max. note input high voltage v ih v 0.7 v dd1 - vdd1 v input low voltage v il v vdd1= 1.65 ~ 3.3v vdd2= 2.5 ~ 3.3v vdd3= 2.5 ~ 3.3v 0 - 0.3 v dd1 v v ih v vpp v il v vpp 7.25v 7.5v 7.75v v output high voltage (sdo, cabc_pwm_out) v oh1 v i oh = -1.0 ma 0.8 v dd1 - vdd1 v output low voltage (sdo, cabc_pwm_out) v ol1 v vdd1= 1.65 ~ 2.4v i ol = 1.0 ma 0 - 0.2 v dd1 v vsync, hsync - - 1 ua i ih ua resx, dcx_scl, csx, rdx, wrx_scl - - 1 ua db[230], sdi, dcx - - 1 ua logic high level input current i ihd ua db[230] - - 1 ua vsync, hsync -1 - ua i il ua resx, dcx, csx, rdx, wrx_scl -1 - ua db[230], sdi, dcx -1 - ua logic low level input current i ild ua db[230] -1 - ua current consumption standby mode (vdd2/vdd3-vssd) i st(vdd) m a - - 100 ua current consumption standby mode ( vdd1C vssd ) i st(vdd1) m a vdd2/vdd3=2.8v, vdd1=1.8v t a =25 c - - 3 ua current consumption during deep-standby mode (vdd2/vdd3-vssd) i dp-st(vdd) m a - - 50 ua current consumption during deep-standby mode ( vdd1C vssd ) i dp-st(vdd1) m a vdd2/vdd3=2.8v, vdd1=1.8v t a =25 c - - 3 ua note: 1. the vpp pin is open on normal mode and in used wh ile otp programming condition. 2. the gram data is eliminated under the deep standb y mode. table 8.2: dc characteristic ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.265- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3 ac characteristics 8.3.1 reset input timing figure 8.1: reset input timing symbol parameter related pins min. typ. max. note unit t resw reset low pulse width (1) resx 10 - - - s - 5 - - when reset is applied during sleep in mode ms t rest reset complete time (2) - 120 - - when reset is applied during sleep out mode ms note: (1) spike due to an electrostatic discharge on resx li ne does not cause irregular system reset according to the table below. resx pulse action shorter than 5 s reset rejected longer than 10 s reset between 5 s and 10 s reset start (2) during the resetting period, the display will b e blanked (the display is entering blanking sequenc e, which maximum time is 120 ms, when reset starts in sleep o ut Cmode. the display remains the blank state in sl eep in Cmode) and then returns to default condition for h/w reset. (3) during reset complete time, id2 value in otp wil l be latched to internal register during this perio d. this loading is done every time when there is h/w reset complete time (trest) within 5ms after a rising edge of resx. (4) spike rejection also applies during a val id reset pulse as shown below: (5) when reset is applied during sleep in mode. (6) when reset is applied during sleep out mode. (7) it is necessary to wait 5msec after releasing r esx before sending commands. also sleep out command ca nnot be sent for 120msec. table 8.3: reset timing t resw t rest resx internal status shorter than 5s normal operation resetting initial condition (default for h/w reset) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.266- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2 dsi d-phy electrical characteristics 8.3.2.1 the electrical characteristics of d-phy lay er in general, the dsi d-phy may contain the following electrical functions: high-speed receiver (hs-rx), low power transmitter (lp-tx), a low-power receiver (lp-rx), and the low-power contention detector (lp-cd). figure 8.2 s hows the complete set of electrical functions required for a fully featured phy transce iver. figure 8.2: electrical functions of a fully d-phy t ransceiver where, the hs receiver utilize low-voltage swing di fferential signaling for signal transmission. the lp transmitter and lp receiver serve as a low p ower signaling mechanism. the figure 8.8 shows both the hs and lp signal levels on the l eft and right sides, respectively. because the hs signaling levels are below the lp lo w-level input threshold, lane switches between low-power and high-speed mode during normal operation. figure 8.3: shows both the hs and lp signal levels ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.267- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.2 the electrical characteristics of low-powe r transmitter the low-power transmitter shall be a slew-rate cont rolled push-pull driver. it is used for driving the lines in all low-power operating modes it is therefore important that the static power consumption of a lp transmitter be as low as possible. under tables list dc and ac characteristic for lp-tx parameter description min. typ. max. unit note v ol thevenin output low level -50 - 50 mv - v oh thevenin output high level 1.1 1.2 1.3 v - z olp output impedance of lp-tx 110 - - ? (1) note: (1)though no maximum value for z olp is specified, the lp transmitter output impedance shall ensure the t rlp /t flp specification is met. table 8.4: lp transmitter dc specifications parameter description min. typ. max. unit note t rlp / tflp 15%-85% rise time and fall time - - 25 ns (1) 83 ns tx_osc=1 t lpx transmitted length of any low Cpower state period 41.5 ns tx_osc=0 slew rate @ cload = 0pf - - 500 mv/ns (1),(3),(5),(6 ) slew rate @ cload = 5pf - - 300 mv/ns (1),(3),(5),(6 ) slew rate @ cload = 20pf - - 250 mv/ns (1),(3),(5),(6 ) slew rate @ cload = 70pf - - 150 mv/ns (1),(3),(5),(6 ) slew rate @ cload = 0 to 70pf (falling edge only) 30 - - mv/ns (1),(2),(3) slew rate @ cload = 0 to 70pf (rising edge only) 30 - - mv/ns (1),(3),(7) v/ t sr slew rate @ cload = 0 to 70pf (rising edge only) 30 C 0.075 * (vo,inst- 700) - - mv/ns (1),(8),(9) c load load capacitance 0 - 70 pf - note: (1) cload includes the low-frequency equivalent tran smission line capacitance. the capacitance of tx an d rx are assumed to always be <10pf. the distributed line capacitance can be up to 50pf for a transmissi on line with 2ns delay. (2) when the output voltage is between 400 mv and 93 0 mv. (3) measured as average across any 50 mv segment of the output signal transition. (4) this parameter value can be lower than tlpx due to differences in rise vs. fall signal slopes and t rip levels and mismatches between dp and dn lp transmitters. (5) this value represents a corner point in a piece wise linear curve. (6) when the output voltage is in the range specifi ed by vpin(absmax). (7) when the output voltage is between 400 mv and 70 0 mv. (8) where vo,inst is the instantaneous output voltage , vdp or vdn, in millivolts. (9) when the output voltage is between 700 mv and 93 0 mv. table 8.5: lp transmitter ac specifications ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.268- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.3 the electrical characteristics of receiver this part will contain two parts which high-speed r eceiver and low-power receiver. because their have differential dc and ac character istic, describe hs-rx first then describe lp-rx. 8.3.2.4 high-speed receiver the hs receiver is a differential line receiver. it contains a switch-able parallel input termination, zid, between the positive input pin dp and the negative input pin dn. under tables list dc and ac characteristic for hs-rx. parameter description min. typ. max. unit note v idth differential input high threshold - - 70 mv - v idtl differential input low threshold -70 - - mv - v ilhs single-ended input low voltage -40 - - mv (1) v ihhs single-ended input high voltage - - 460 mv (1) v cmrxdc common-mode voltage hs receive mode 70 - 330 mv (1),(2) z id differential input impedance 80 100 125 ? - note: (1) excluding possible additional rf interference of 100mv peak sine wave beyond 450mhz. (2) this table value includes a ground difference o f 50mv between the transmitter and the receiver, the static common-mode level tolerance and variations below 45 0mhz table 8.6: hs receiver dc specifications parameter description min. typ. max. unit note ? v cmrx(hf) common mode interference beyond 450 mhz - - 100 mv pp (1) c cm common mode termination - - 60 pf (2) note: (1) ? vcmrx(hf) is the peak amplitude of a sine wave super imposed on the receiver inputs. (2) for higher bit rates a 14pf capacitor will be n eeded to meet the common-mode return loss specifica tion. table 8.7: hs receiver ac specifications ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.269- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.5 low-power receiver the low power receiver is an un-terminated, single- ended receiver circuit. the lp receiver is used to detect the low-power state on each pin. for high robustness, the lp receiver shall filter out noise pulses and rf interference. it is recommended the implementer optimize the lp receiver design for low power. the lp receiver s hall reject any input glitch when the glitch is smaller than espike. the filter shall allow puls es wider than tmin to propagate through the lp receiver. the related diagram shows as figur e 8.4 input glitch rejection of low-power receivers. besides, under tables list dc and ac characteristic for lp-rx. figure 8.4: input glitch rejections of low-power re ceivers parameter description min. typ. max. unit note v il logic 0 input threshold - - 550 mv - v ih logic 1 input threshold 880 - - mv - table 8.8: lp receiver dc specifications parameter description min. typ. max. unit note e spike input pulse rejection - - 300 v.ps 1, 2, 3 t min-rx minimum pulse width response 20 - - ns 4 v int peak-to-peak interference voltage - - 200 mv - f int interference frequency 450 - - mhz - note: (1) time-voltage integration of a spike above vil w hen being in lp-0 state or below vih when being in lp-1 state (2) an impulse less than this will not change the re ceiver state. (3) in addition to the required glitch rejection, i mplementers shall ensure rejection of known rf-inte rferers. (4) an input pulse greater than this shall toggle th e output. table 8.9: lp receiver ac specifications ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.270- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.6 line contention detection contention can be inferred from any of the followin g conditions: a. an lp high fault shall be detected when the lp t ransmitter is driving high and the pin voltage is less than vil. b. an lp low fault shall be detected when the lp tr ansmitter is driving low and the pad pin voltage is greater than vilf. parameter description min. typ. max. unit note v ihcd logic 1 contention threshold 450 - - mv - v ilcd logic 0 contention threshold - - 200 mv - table 8.10: contention detector dc specifications ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.271- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.7 high-speed data-clock timing this section specifies the required timings on the high-speed signaling interface independent of the electrical characteristics of the signal. th e phy is a source synchronous interface in the forward direction. the master side of the link shall send a differenti al clock signal to the slave side to be used for data sampling. this signal shall be a ddr (half -rate) clock and shall have one transition per data bit time. all timing relationships require d for correct data sampling are defined relative to the clock transitions. therefore, imple mentations may use frequency spreading modulation on the clock to reduce emi. the ddr clock signal shall maintain a quadrature ph ase relationship to the data signal. data shall be sampled on both the rising and falling edg es of the clock signal. the term rising edge means rising edge of the differential signal , i.e. cp C cn, and similarly for falling edge. therefore, the period of the clock signal sh all be the sum of two successive instantaneous data bit times. this relationship is shown in figure 8.5. figure 8.5: ddr clock definition the same clock source is used to generate the ddr c lock and launch the serial data. since the clock and data signals propagate together over a channel of specified skew, the clock may be used directly to sample the data lines in th e receiver. such a system can accommodate large instantaneous variations in ui. the allowed instantaneous ui variation can cause la rge, instantaneous data rate variations. therefore, devices shall either accommodate these i nstantaneous variations with appropriate fifo logic outside of the phy or provide an accurat e clock source to the lane module to eliminate these instantaneous variations. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.272- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 the uiinst specifications for the clock signal are summarized in table 8.11. parameter symbol min. typ. max. unit note ui instantaneous ui inst - - 12.5 ns (1), (2), (3), (4), (5), (6) note: (1) this value corresponds to a minimum 80 mbps da ta rate. (2) the minimum ui shall not be violated for any si ngle bit period, i.e., any ddr half cycle within a data burst. (3) maximum total bit rate is 850mbps of 1 data lan e 24-bit data format/ 630mbps of 1 data lane 18-bit data format/ 560mbps of 1 data lane 16-bit data format. (4) maximum total bit rate is 1.7gbps of 2 data lan es 24-bit data format/ 1.27gbps of 2 data lane 18-b it data format/ 1.13gbps of 2 data lane 16-bit data format. (5) maximum total bit rate is 2gbps of 3 data lanes 24-bit data format/ 1.5gbps of 3 data lane 18-bit data format/ 1.33gbps of 3 data lane 16-bit data format. (6) maximum total bit rate is 2gbps of 4 data lanes 24-bit data format/ 1.5gbps of 4 data lane 18-bit data format/ 1.33gbps of 4 data lane 16-bit data format. table 8.11: re verse hs data transmission timing pa rameters the timing relationship of the ddr clock differenti al signal to the data differential signal is shown in figure 8.6. data is launched in a quadratu re relationship to the clock such that the clock signal edge may be used directly by the recei ver to sample the received data. the transmitter shall ensure that a rising edge of the ddr clock is sent during the first payload bit of a transmission burst such that the f irst payload bit can be sampled by the receiver on the rising clock edge, the second bit c an be sampled on the falling edge, and all following bits can be sampled on alternating rising and falling edges. all timing values are measured with respect to the actual observed crossing of the clock differential signal. the effects due to variations in this level are included in the clock to data timing budget. receiver input offset and threshold effects shall b e accounted as part of the receiver setup and hold parameters. figure 8.6: data to clock timing definitions ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.273- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.2.8 data-clock timing specifications the data-clock timing specifications are shown in t able 8.6. implementers shall specify a value uiinst,min that represents the minimum instan taneous ui possible within a high-speed data transfer for a given implementation . parameters in table 8.12 are specified as a part of this value. the skew specification, ts kew[tx], is the allowed deviation of the data launch time to the ideal ?uiinst displaced qua drature clock edge. the setup and hold times, tsetup[rx] and thold[rx], respectively, desc ribe the timing relationships between the data and clock signals. tsetup[rx] is the minim um time that data shall be present before a rising or falling clock edge and thold[rx] is the minimum time that data shall remain in its current state after a rising or falli ng clock edge. the timing budget specifications for a receiver shall represent the minimum variatio ns observable at the receiver for which the receiver will operate at the maximum specified acce ptable bit error rate. the intent in the timing budget is to leave 0.4*uii nst, i.e. 0.2*uiinst for degradation contributed by the interconnect. parameter symbol min. typ. max. unit note data to clock setup time [receiver] t setup[rx] 0.15 - - uiinst 1,2 clock to data hold time [receiver] t hold[rx] 0.15 - - uiinst 1,2 note: (1) total setup and hold window for receiver of 0. 3*uiinst. (2) the vdiff is 150mv. table 8.12: data to clock timing specifications ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.274- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.3 timings for dsi video mode 8.3.3.1 vertical timings figure 8.7: vertical timings for dsi video mode i/f resolution=800x1280(vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 1286 - - line vertical low pulse width vs - 2 - note(1) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(1) line vertical data start point - vs+vbp 4 - note(1) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 1280 - line vertical refresh rate vrr - - 60 - hz note: (1) the vs and vbp pulse width are related to gspand gck ti ming. the gsp and gck must be set at corresponding position for lcd normal display. also refer to setion 6.2.78 setrgbcyc. resolution=768x1280 (vssa=0v, vdd1=1.8v, vdd2=2.8v , vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 1286 - - line vertical low pulse width vs - 2 - note(1) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(1) line vertical data start point - vs+vbp 4 - note(1) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 1280 - line vertical refresh rate vrr - - 60 - hz note: (1) the vs and vbp pulse width are related to gspand gck ti ming. the gsp and gck must be set at corresponding position for lcd normal display. also refer to setion 6.2.78 setrgbcyc. ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.275- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 resolution=720x1280 (vssa=0v, vdd1=1.8v, vdd2=2.8v , vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 1286 - - line vertical low pulse width vs - 2 - note(1) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(1) line vertical data start point - vs+vbp 4 - note(1) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 1280 - line vertical refresh rate vrr - - 60 - hz note: (1) the vs and vbp pulse width are related to gspand gck ti ming. the gsp and gck must be set at corresponding position for lcd normal display. also refer to setion 6.2.78 setrgbcyc. resolution=600x1024 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 1030 - - line vertical low pulse width vs - 2 - note(1) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(1) line vertical data start point - vs+vbp 4 - note(1) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 1024 - line vertical refresh rate vrr - - 60 - hz note: (1) the vs and vbp pulse width are related to gspand gck ti ming. the gsp and gck must be set at corresponding position for lcd normal display. also refer to setion 6.2.78 setrgbcyc. table 8.13: vertical timings for dsi video mode i/f ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.276- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 8.3.3.2 horizontal timings invalid data valid data invalid data hdisp hs hbp hfp hfp hp packed pixel stream (24-bit rgb) bp bp hss bp bp hss (pclk depend on dsi clock and data lanes) figure 8.8: horizontal timing for dsi video mode i/ f resolution=800x1280 (vssa=0v, vdd1=1.8v, vdd2=vdd3 =hs_vcc=2.8v, t a =25c) item symbol condition min. typ. max. unit hs low pulse width hs - 5 - - dck horizontal back porch hbp - 5 - - dck horizontal front porch hfp - 5 - - dck horizontal data start point - hs+hbp 2 - - us horizontal active area hdisp - - 800 - dck resolution=768x1280 (vssa=0v, vdd1=1.8v, vdd2=2.8v , vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit hs low pulse width hs - 5 - - dck horizontal back porch hbp - 5 - - dck horizontal front porch hfp - 5 - - dck horizontal data start point - hs+hbp 2 - - us horizontal active area hdisp - - 768 - dck ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.277- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 resolution=720x1280 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit hs low pulse width hs - 5 - - dck horizontal back porch hbp - 5 - - dck horizontal front porch hfp - 5 - - dck horizontal data start point - hs+hbp 2 - - us horizontal active area hdisp - - 720 - dck resolution=600x1024 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit hs low pulse width hs - 5 - - dck horizontal back porch hbp - 5 - - dck horizontal front porch hfp - 5 - - dck horizontal data start point - hs+hbp 2 - - us horizontal active area hdisp - - 600 - dck table 8.14: horizontal timings for dsi video mode i /f ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.278- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 9. ordering information part no. package HX8392-A000 pdxxx pd: mean cog xxx: mean chip thickness (m), (default: 250 m) 10. revision history version date description of changes 2011/05/12 1. remove temporary word and upgrade to version 01. (all pages) 2. update vdd2, vdd3, vssd pin number.(p.15) 3. change pad name from vdd2 to vssd.(p.17, p.18, p.255, p256) 4. change pad name from vsnc to vdd2.(p.17, p.18, p.255, p25). 5. update note description of figure 5.33 panel dri ving timing (p.107) 6. update register default value.(p.135~p.139) 7. update register description of stb, vsp_en, vsn_en, vgh_en, vgl_en, vcl_en. (p.205~p.206) 8. update register description of gon, dte, d[1:0] (p.205~p.206) 9. update register description of btp[4:0] and btn[4:0].(p.207~p.208) 10. add tx_osc bit in bah command.(p.136, p.229) 11. update description of c2h command (p.231) 12. add d4 command.(p.136, p.240) 13. update 7.1 layout recommendation.(p.255, p256) 14. update table 8.14 hrizontal timings for dsi vid eo mode i/f.(p.273, p.274) 2011/06/14 1. update 3.4.1 bump arrangement.(p.24) 2. update figure 5.25: osc aritecture(p.61) 3. add note for pwm_clk.(p.234) 4. add e3h command of color enhancement function. (p.139, p.253) 5. add f7h command of get db[7:0] pin status. (p.13 9, p.256) 2011/09/28 1. add note for gamma voltage.(p.69) 2. update bp/ fp/ bp_pe/ fp_pe setting.(p.214) 3. update tx_osc setting.(p.229) 4. remove 1 pcs hx5186-a for external charge pump circuit.(p.258, p261) 5. update table 8.2: dc characteristic.(p.263) 6. add t lpx timing characteristic.(p.266) 7. add note for data to clock timing specifications (p.272) 01 2011/10/07 1. add setmipi in otp table.(p.117) 2. add otp programming delay time of block program.(p.126) 3. update b2h and d8h default value.(p.134, p.136) 4. add tx_delay[1:0] in bah command.(p.135, p228) 5. add bfh command.(p.135, p.230) 6. update d4h default value.(p.136, p.240) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ -p.279- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, rep roduced, or disclosed in whole or in part without prior written permissio n of himax. october, 2011 HX8392-A 800rgbx1280dots, ltps mobile single chip driver data sheet v01 7. add d5h command.(p136, p.241) ' p s 5 s v m z 0 o m z http://www..net/ datasheet pdf - http://www..net/ |
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